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參數(shù)資料
| 型號： | DRC-10520-493S |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 位置變換器 |
| 英文描述： | DIGITAL TO SYNCHRO OR RESOLVER, DMA32 |
| 封裝： | TRIPLE, DIP-32 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 167K |
| 代理商： | DRC-10520-493S |
5
Data Device Corporation
www.ddc-web.com
DRC-10520
N-05/05-0
OUTPUT PROTECTION AND BIT
The output is protected from overcurrent, short circuits and volt-
age feedback transients. The BIT circuit detects overcurrent con-
ditions in the sine or cosine resolver output. A logic “0” is used for
overcurrent detection. Normal operation is logic “1.” The BIT line
is normally at logic “1.” An overload or short circuit will cause the
BIT line to drop after 1 sec when the output current exceeds a
peak level of approximately 450 mA.
OUTPUT PHASING AND OUTPUT SCALE FACTOR
The analog output signals have the following phasing:
sin = (R
H-RL) AO [1 + A (θ)] sin θ
cos = (R
H-RL) AO [1 + A (θ)] cos θ
The output amplifiers simultaneously track reference voltage
fluctuations because they are proportional to (R
H-RL). The ampli-
tude factor A
O is 2 for 6.8V rms L-L output. The maximum varia-
tion in A
O from all causes is 0.3%. The term A (θ) represents the
variation of the amplitude with the digital input angle. A (
θ),
which is called the scale factor variation, is a smooth function of
θ without discontinuities and is less than ±0.1% for all values of
θ. The total maximum variation in A
O [1 + A (θ)] is therefore
±0.4%.
Because the amplitude factor (R
H-RL) AO [1 + A (θ)] varies simul-
taneously on all output lines, it will not be a source of error when
the DRC-10520 is to drive a ratiometric system such as a
resolver or synchro. However, if the outputs are used independ-
ently, as in x-y plotters, the amplitude variations must be taken
into account.
THERMAL CONSIDERATIONS
The power stage consists of two power amplifiers: one for the
sine output and one for the cosine output. Maximum power stage
junction temperature rise occurs at 0° and 180° for the sine out-
put and 90° and 270° for the cosine output.
Maximum power dissipation for the hybrid occurs at the
interquadrant points: 45°, 135°, 225°, and 315°. At these points
the total power dissipation of each amplifier is 0.707 max.
Therefore, the total power dissipation is 1.41 times the max for
any one amplifier.
The thermal resistance junction to the outside of the case is
10.6°C/W. For a 2 VA purely inductive load and ±15 VDC power
supplies, the junction temperature rise is 42°C. For a real induc-
tive load (one that has some power dissipation) and using pul-
sating supplies, the power dissipated is cut in half. The tempera-
ture rise is also halved to 21°C.
DRC-10520
GND
+COS
-V
+V
+SIN
R
H
R
L
6.8 Vrms
1
6
2
4
3
5
8
7
S
R
S
1
(SYNCHRO ONLY)
(RESOLVER
ONLY)
S
3
S
4
S
2
T-2
C-1
+
C-2
D1
D4
D2
D3
1
2
4
5
3
7
6
T-1
29306
33920
REFERENCE
SOURCE
400 Hz
21.6 Vrms
C.T.
3.4 Vrms
29305
32976
*29947 RESOLVER
±15 V
DIGITAL INPUT
PARTS LIST FOR 400 Hz
For T1 and T2 see Ordering Information
D1, D2, D3, and D4 = 1N4245
C-1 and C-2 = 22 F, 35 V DC capacitor
35 V DC
FIGURE 3. TYPICAL CONNECTION DIAGRAM UTILIZING PULSATING
POWER SOURCE FOR SYNCHRO OUTPUT
TABLE 2. PIN CONNECTIONS
PIN
FUNCTION
PIN
FUNCTION
PIN
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
N.C.
16 (LSB)
COS
SIN
+V
-V
1 (MSB)
2
3
4
12
13
14
15
16
17
18
19
20
21
22
5
6
7
8
LM
LL
9
10
11
12
13
23
24
25
26
27
28
29
30
31
32
14
RL
RH
15
-15 V
GND
LA
+15 V
BIT
N.C.
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