參數(shù)資料
型號: DM93L00
文件頁數(shù): 81/158頁
文件大?。?/td> 2668K
代理商: DM93L00
Functional Description
The 9348 is a 12-input parity generator. It provides odd and even parity for up to 12 data bits. The Even Parity output (PE) will be
HIGH if an even number of logic ones are present on the inputs. The Odd Parity output (PO) will be HIGH if an odd number of
logic ones are present on the inputs. The logic equations for the outputs are shown below.
PO
PE
e
e
I0
Z
I1
Z
I2
Z
I3
Z
I4
Z
I5
Z
I6
Z
I7
Z
I8
Z
I9
Z
I10
Z
I11
I0
Z
I1
Z
I2
Z
I3
Z
I4
Z
I5
Z
I6
Z
I7
Z
I8
Z
I9
Z
I10
Z
I11
Note:
Less through delay is encountered from the I0, I1, I2 and I3 inputs than I4 thru I11 inputs. Therefore, if some signals are slower than others, the slower
signals should be applied to these four inputs for maximum speed.
Truth Table
Inputs
Outputs
I0–I11
PO
PE
All Twelve
Any One
Any Two
Any Three
Inputs LOW
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
H
L
H
L
Any Four
Any Five
Any Six
Any Seven
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
H
L
H
L
Any Eight
Any Nine
Any Ten
Any Eleven
Any Twelve
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
L
H
L
H
L
H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
Logic Diagram
TL/F/9795–3
3
相關PDF資料
PDF描述
DM93L01
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相關代理商/技術參數(shù)
參數(shù)描述
DM93L01 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
DM93L08 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
DM93L09 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
DM93L10 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
DM93L12 制造商:未知廠家 制造商全稱:未知廠家 功能描述: