- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376803 > DM9338 PDF資料下載
參數(shù)資料
| 型號： | DM9338 |
| 文件頁數(shù)： | 10/43頁 |
| 文件大?。?/td> | 509K |
| 代理商： | DM9338 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
DM9331
100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
10
Preliminary
Version: DM9331-DS-P02
September 21, 2001
Functional Description
The DM9331 Fast Ethernet single-chip transceiver,
providing the functionality as specified in IEEE 802.3u,
integrates a complete 100Base-TX module and a complete
100Base-FX module. The DM9331 provides a Media
Converter Interface (MCI) as connection interface.
The DM9331 performs all PCS (Physical Coding Sublayer),
PMA (Physical Media Access), TP-PMD (Twisted Pair
Physical Medium Dependent) sublayer and a PECL
compliant interface for a fiber optic module. Figure 1
shows the major functional blocks implemented in the
DM9331.
Media
Converter
Interface
(MCI)
1
00Base-TX/FX
Transmitter
1
00Base-TX/FX
Receiver
Auto
Negotiation
MII Serial
Management
Interface
Figure 1
MCI Interface
The DM 9331 provides a Media Converter Interface (MCI) .
The purpose of the MCI interface is to provide a simple, easy
to implement connection to another DM9331.
The MCI consists of a 2 bits receive data bus, a two bits
transmit data bus, and control signals to facilitate data
transfers between the two DM9331 chips.
TXD (transmit data) is a two bits of data that are driven
by the reconciliation sublayer synchronously with
respect to OSCIN clock For each OSCIN clock period
which TXEN is asserted, TXD (1:0) are accepted for
transmission by the PHY.
TXEN (transmit enable) input from another DM9331
RXDV signal reconciliation sublayer indicates that data
are being presented on the MCI for transmission on the
physical medium.
RXD (receive data) is a two bits of data that are
sampled by the reconciliation sublayer synchronously
with respect to OSCIN clock. For each OSCIN clock
period which RXDV is asserted, RXD (1:0) are
transferred from the PHY to another DM9331.
RXDV (receive data valid) output to another DM9331
TXEN signal indicates that the DM9331 is data ready.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9334 | 8-Bit Addressable Latch |
| DM9334N | 8-Bit Addressable Latch |
| DM9348 | |
| DM93L00 | |
| DM93L01 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9338 WAF | 制造商:Texas Instruments 功能描述: |
| DM9338J/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Register File |
| DM9338N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Multiple Port Register |
| DM9338W/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DM933N | 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。