參數(shù)資料
型號(hào)： DM9300
文件頁數(shù)： 86/158頁
文件大?。?/td> 2668K
代理商： DM9300
Functional Description
The Logic Diagrams and Truth Table indicate the functional
characteristics of the 93L00 4-bit shift register. The device is
useful in a wide variety of shifting, counting and storage
applications. It performs serial, parallel, serial-to-parallel, or
parallel-to-serial data transfers.
The 93L00 has two primary modes of operation, shift right
(Q0
Q1) and parallel load, which are controlled by the
state of the Parallel Enable (PE) input. When the PE input is
HIGH, serial data enters the first flip-flop Q0 via the J and K
inputs
and
is
one
Q0
Q1
x
Q2
x
Q3
following
clock transition. The JK inputs provide the flexibility of the
JK type input for special applications, and the simple D-type
input for general applications by tying the two pins together.
bit
in
the
LOW-to-HIGH
direction
each
When the PE input is LOW, the 93L00 appears as four com-
mon clocked D flip-flops. The data on the parallel inputs
P0–P3 is transferred to the respective Q0–Q3 outputs fol-
lowing the LOW-to-HIGH clock transition. Shift left opera-
tion (Q3
Q2) can be achieved by tying the Qn outputs to
the Pn
b
1 inputs and holding the PE input LOW.
All serial and parallel data transfers are synchronous, occur-
ing after each LOW-to-HIGH clock transition. Since the
93L00 utilizes edge triggering, there is no restriction on the
activity of the J, K, Pn and PE inputs for logic operationDex-
cept for the setup and release time requirements. A LOW on
the asynchronous Master Reset (MR) input sets all Q out-
puts LOW, independent of any other input condition.
Truth Table
Operating
Mode
Inputs (MR
e
H)
Outputs
@
t
n
a
1
PE
J
K
P0
P1
P2
P3
Q0
Q1
Q2
Q3
Q3
H
H
H
H
L
L
H
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
Q0
Q0
Q0
Q0
Q1
Q1
Q1
Q1
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Shift Mode
Q0
Q0
H
Parallel
Entry Mode
L
L
X
X
X
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
L
*
t
n
a
1
e
Indicates state after next LOW-to-HIGH clock transition.
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
4
相關(guān)PDF資料
PDF描述
DM9322
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9638N 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9368N LED Display Driver
DM9370 7-Segment Decoder/Driver/Latch with Open-Collector Outputs(集電極開路輸出的7段譯碼器/驅(qū)動(dòng)器/鎖存器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9300 WAF 制造商:Texas Instruments 功能描述:
DM9300J 制造商:National Semiconductor Corporation 功能描述: 制造商:Texas Instruments 功能描述:
DM9300J/883 制造商:Rochester Electronics LLC 功能描述:- Bulk
DM9300W/883 制造商:Rochester Electronics LLC 功能描述:- Bulk
DM9301 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*