參數(shù)資料
型號(hào): DM9300
文件頁數(shù): 81/158頁
文件大小: 2668K
代理商: DM9300
Functional Description
The 9348 is a 12-input parity generator. It provides odd and even parity for up to 12 data bits. The Even Parity output (PE) will be
HIGH if an even number of logic ones are present on the inputs. The Odd Parity output (PO) will be HIGH if an odd number of
logic ones are present on the inputs. The logic equations for the outputs are shown below.
PO
PE
e
e
I0
Z
I1
Z
I2
Z
I3
Z
I4
Z
I5
Z
I6
Z
I7
Z
I8
Z
I9
Z
I10
Z
I11
I0
Z
I1
Z
I2
Z
I3
Z
I4
Z
I5
Z
I6
Z
I7
Z
I8
Z
I9
Z
I10
Z
I11
Note:
Less through delay is encountered from the I0, I1, I2 and I3 inputs than I4 thru I11 inputs. Therefore, if some signals are slower than others, the slower
signals should be applied to these four inputs for maximum speed.
Truth Table
Inputs
Outputs
I0–I11
PO
PE
All Twelve
Any One
Any Two
Any Three
Inputs LOW
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
H
L
H
L
Any Four
Any Five
Any Six
Any Seven
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
H
L
H
L
Any Eight
Any Nine
Any Ten
Any Eleven
Any Twelve
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
Inputs HIGH
L
H
L
H
L
H
L
H
L
H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
Logic Diagram
TL/F/9795–3
3
相關(guān)PDF資料
PDF描述
DM9322
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9638N 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9368N LED Display Driver
DM9370 7-Segment Decoder/Driver/Latch with Open-Collector Outputs(集電極開路輸出的7段譯碼器/驅(qū)動(dòng)器/鎖存器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9300 WAF 制造商:Texas Instruments 功能描述:
DM9300J 制造商:National Semiconductor Corporation 功能描述: 制造商:Texas Instruments 功能描述:
DM9300J/883 制造商:Rochester Electronics LLC 功能描述:- Bulk
DM9300W/883 制造商:Rochester Electronics LLC 功能描述:- Bulk
DM9301 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter