參數(shù)資料
型號: DM9300
文件頁數(shù): 83/158頁
文件大?。?/td> 2668K
代理商: DM9300
TL/F/9576
9
June 1989
93L00
4-Bit Universal Shift Register
General Description
The 93L00 is a 4-bit universal shift register. As a high speed
multifunctional sequential logic block, it is useful in a wide
variety of register and counter applications. It may be used
in serial-serial, shift left, shift right, serial-parallel, parallel-
serial, and parallel-parallel data register transfers.
Features
Y
Asynchronous master reset
Y
J, K inputs to first stage
Connection Diagram
Dual-In-Line Package
TL/F/9576–1
Order Number 93L00DMQB or 93L00FMQB
See NS Package Number J16A or W16A
Logic Symbol
TL/F/9576–2
V
CC
e
Pin 16
GND
e
Pin 8
Pin Names
Description
PE
P0–P3
J
K
CP
MR
Q0–Q3
Q3
Parallel Enable Input (Active LOW)
Parallel Inputs
First Stage J Input (Active HIGH)
First Stage K Input (Active LOW)
Clock Pulse Input (Active Rising Edge)
Master Reset Input
Parallel Outputs
Complementary Last Stage Output
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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