參數(shù)資料
型號: DM9008F
廠商: Electronic Theatre Controls, Inc.
英文描述: ISA/Plug & Play Super Ethernet Contoller
中文描述: 的ISA /插頭
文件頁數(shù): 47/68頁
文件大?。?/td> 403K
代理商: DM9008F
DM9008
ISA/Plug & Play Super Ethernet Contoller
Collision Function
Final
Version :DM9008-DS-F02
June 14, 2000
47
Functional Description
TPMAU Function
TPMAU receives transmit data and transfers the data to the TP
network. The input must be transformer-coupled to the AUI
circuit. The receiver is able to pass differential signals as small
as 300 mV peak and as large as 1315 mV. DC biasing is
provided with internal common mode, set to nominal 2.5V. An
internal analog delay line is used to generate the pre-distortion
signals. A delay lock loop, referencing the CLOCK INPUT, is
used to generate the internal delay line. All TP output driver
pins are driven low in response to any of the following: there is
an AUI IDL pulse of at least 200ns duration; the output driver is
jabbered; there is a link failure; or an IDL pulse is not detected
at the end of a packet and the input does not exceed the
detection threshold of 500
±
100ns. When the driver detects that
it has finished sending an IDL pulse to the TP, a timer of not
more than 500ns is activated.
Receive Function
The TP receiver is connected to a band-limiting filter whose
input is transformer-coupled to the twisted-pair TPRX+/TPRX
pins. The receiver is able to resolve differential signals as small
as 350mV peak. Common mode input voltage is provided with
internal common mode, with the common mode set to nominal
2.5V. The receiver squelch circuit prevents noise on the
twisted-pair cable from falsely triggering the receiver in the
absence of true data. The receiver will not be activated for
signals when the buffer input has a peak amplitude below
300mV, a continuous frequency below 2 MHz, or a single cycle
duration within the pass band of the receive filter. The current
through the load results in an output voltage between
±
0.6V
and
±
1.2V, measured differentially between the two pins.
When the driver detects that it has finished sending an IDL
pulse to the AUI, a timer of not more than 500ns is activated.
While this timer is active, activity on the TPRX+/TPRX- inputs
is ignored, and the AUI driver discharges the current stored in
the inductive load.
A collision state exists whenever valid inputs to the TPMAU
from the network and from the DTE are received
simultaneously, and the device is not in a link-integrity failure
state. The TPMAU reports collisions to the AUI by sending a 10
Mhz signal. The collision report signal is sent out no more than
9 bit times (BT) after the chip detects a collision. If
TPRX+/TPRX- become active while there is activity on the
transmission pair, the loopback data on TPRX+/TPRX-
switches from transmit mode to receive mode within 13
±
3BT. If
a collision condition exists with TPRX+/TPRX- having gone
idle while transmission pair is still active, SQE continues for
7
±
2BT. If a collision condition exists with a transmission pair
having gone idle while TPRX+/TPRX are still active, SQE may
continue for up to 9 BT.
Jabber Function
Jabber is a self-interrupt function that keeps a damaged node
from continuously transmitting to the network. The chip
contains a nominal window of 50 ms, during which time a
normal data link frame can be transmitted. If a frame length
exceeds this duration, the jabber function inhibits transmission
and sends a collision signal over the collision pair. When
activity on the transmission pair has ceased, the chip
continues to present the CS0 signal to the collision pair for
0.5s
±
0.25s. The transmission of link-integrity pulses from the
TP drivers is not inhibited when the TPMAU is jabbed and the
link integrity function is enabled.
SQE Test Function
When the TPMAU transmission pair has gone idle after a
successful transmission and the heartbeat function is enabled,
the chip presents the CS0 signal to the collision pair. After a
successful transmission to the network media, the chip
presents the CS0 signal within 11
±
5BT of the time activity on
the transmission pair has ceased. The CS0 signal is presented
for 10
±
5BT, after which the chip presents an IDL on the
collision pair and returns to the idle state.
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