參數(shù)資料
型號： DM9008
廠商： Electronic Theatre Controls, Inc.
英文描述： ISA/Plug & Play Super Ethernet Contoller
中文描述： 的ISA /插頭
文件頁數(shù)： 44/68頁
文件大?。?/td> 403K
代理商： DM9008
DM9008
ISA/Plug & Play Super Ethernet Contoller
To initiate a loopback, the user first assembles the loopback
packet, then selects the type of loopback using TCR bits LB0,
LB1. TCR must also be set to enable or disable CRC
generation during transmission. The user then issues a normal
transmit command to send the packet. During loopback, the
receiver checks for an address match. If the CRC bit in the
TCR is set, the receiver will also check the CRC. The last 8
bytes of the loopback packet are buffered and can be read out
of the FIFO using the FIFO read port.
44
Final
Version :DM9008-DS-F02
June 14, 2000
Restrictions During Loopback
The FIFO is split into two halves. The first half is used for
transmission, the second for reception. Because only 8-bit
fields can be fetched from memory, two tests are required for
16-bit systems to verify the integrity of the entire data path.
Only the last 8 bytes of the loopback packet are retained in the
FIFO. These 8 bytes can be read through the FIFO register,
which will advance through the FIFO to allow the receive
packet to be read sequentially.
When DM9008 is in word-wide mode with Byte Order Select
set, the loopback packet must be assembled in the even byte
locations, as shown below. (The loopback only operates with
byte wide transfers.)
LS BYTE
MS BYTE
DESTINATION
SOURCE
LENGTH
DATA
CRC
WTS = 1 BOS=1 in DCR
When the device is in word-wide mode with Byte Order Select
low, the following format must be used for loopback.
LS BYTE
MS BYTE
DESTINATION
SOURCE
LENGTH
DATA
CRC
WTS = 1 BOS=0 in DCR
Note:When loopback is used in word mode, 2n bytes
must be programmed in TBCRO, 1, where n=actual
number of bytes assembled in even or odd
locations.
Loopback Modes
Mode 1: Loopback through the controller (LB1 = 0, LB0
=1).
If the loopback is through the ENC, the serializer is simply
linked to the deserializer, and the receive clock is derived from
the transmit clock.
Mode 2:Loopback through the ENA (LB1 = 1, LB0 = 0).
Mode 3: Loopback to Coax (LB1 = 1, LB0 =1).
Packets can be transmitted to the co-ax in loopback mode to
check all of the transmit and receive paths, as well as the co-
ax itself.
Note:It is not possible to switch directly between the loopback
modes, necessitating return to normal operation (00H) in order
to change modes.
Reading the Loopback Packet
The last eight bytes of a received packet can be examined by 8
consecutive reads of the FIFO register. The FIFO pointer is
incremented after the rising edge of the PC read strobe by
internally synchronizing and advancing. If the pointer has not
been incremented by the time the PC reads the FIFO register
again, DM9008 will insert wait states.
相關(guān)PDF資料
PDF描述
DM9008F ISA/Plug & Play Super Ethernet Contoller
DM9081 10BASE-T Hub Controller
DM9081F 10BASE-T Hub Controller
DM9095 Twisted-Pair Medium Attachment Unit
DM9095L Twisted-Pair Medium Attachment Unit
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9008AEP 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller with General Processor Interface
DM9008AEP_06 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller with General Processor Interface
DM9008AEP_08 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller with General Processor Interface
DM9008C 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller With General Processor Interface
DM9008CEP 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller With General Processor Interface
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*