參數(shù)資料
型號: DAC8408AT
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Quad 8-Bit Multiplying CMOS D/A Converter with Memory
中文描述: QUAD, PARALLEL, 8 BITS INPUT LOADING, 0.19 us SETTLING TIME, 8-BIT DAC, CDIP28
封裝: CERDIP-28
文件頁數(shù): 10/16頁
文件大小: 217K
代理商: DAC8408AT
DAC8408
–10–
REV. A
BASIC APPLICAT IONS
Some basic circuit configurations are shown in Figures 6 and 7.
Figure 6 shows the DAC8408 connected in a unipolar configu-
ration (2-Quadrant Multiplication), and T able I shows the Code
T able. Resistors R1, R2, R3, and R4 are used to trim full scale
output. Full-scale output voltage = V
REF
–1 LSB = V
REF
(1–2
–8
)
or V
REF
×
(255/256) with all digital inputs high. Low tempera-
ture coefficient (approximately 50 ppm/
°
C) resistors or trim-
mers should be selected if used. Full scale can also be adjusted
using V
REF
voltage. T his will eliminate resistors R1, R2, R3, and
R4. In many applications, R1 through R4 are not required, and
the maximum gain error will then be that of the DAC.
Each DAC exhibits a variable output resistance that is code-
dependent. T his produces a code-dependent, differential non-
linearity term at the amplifier’s output which can have a maxi-
mum value of 0.67
×
the amplifier’s offset voltage. T his differ-
ential nonlinearity term adds to the R-2R resistor ladder differ-
ential-nonlinearity; the output may no longer be monotonic. T o
maintain monotonicity and minimize gain and linearity errors, it
is recommended that the op amp offset voltage be adjusted to
less than 10% of 1 LSB (1 LSB = 2
–8
×
V
REF
or 1/256
×
V
REF
),
or less than 3.9 mV over the operating temperature range. Zero-
scale output voltage (with all digital inputs low) may be adjusted
using the op amp offset adjustment. Capacitors C1, C2, C3,
and C4 provide phase compensation and help prevent overshoot
and ringing when using high speed op amps.
Figure 7 shows the recommended circuit configuration for the
bipolar operation (4-quadrant multiplication), and T able II shows
the Code T able. T rimmer resistors R17, R18, R19, and R20
are used only if gain error adjustments are required and range
between 50
and 1000
. Resistors R21, R22, R23, and R24
will range betwen 50
and 500
. If these resistors are used, it
is essential that resistor pairs R9–R13, R10–R14, R11–R15,
R12–R16 are matched both in value and tempco. T hey should
be within 0.01%; wire wound or metal foil types are preferred
for best temperature coefficient matching. T he circuits of Figure
6 and 7 can either be used as a fixed reference D/A converter, or
as an attenuator with an ac input voltage.
T able I. Unipolar Binary Code T able (Refer to Figure 6)
DAC Data Input
MSB
LSB
Analog Output
1 1 1 1 1 1 1 1
–V
REF
255
256
129
256
128
256
127
256
1
256
0
256
=
= 0
1 0 0 0 0 0 0 1
–V
REF
1 0 0 0 0 0 0 0
–V
REF
V
IN
2
0 1 1 1 1 1 1 1
–V
REF
0 0 0 0 0 0 0 1
–V
REF
0 0 0 0 0 0 0 0
–V
REF
NOT E
1 LSB = (2
–8
) (V
REF
) =
1
256
(V
REF
)
Figure 6. Quad DAC Unipolar Operation (2-Quadrant Multiplication)
相關PDF資料
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DAC8408BT Quad 8-Bit Multiplying CMOS D/A Converter with Memory
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