參數(shù)資料
型號: DAC8248FW
廠商: PRECISION MONOLITHICS INC
元件分類: DAC
英文描述: Dual 12-Bit 8-Bit Byte Double-Buffered CMOS D/A Converter
中文描述: 12-BIT DAC, CDIP24
文件頁數(shù): 3/16頁
文件大?。?/td> 350K
代理商: DAC8248FW
Parameter
Symbol
Conditions
DAC8248
Units
V
DD
= +5 V
–40
8
C to +85
8
C
(Note 9)
V
DD
= +15 V
All T emps
(Note 10)
Switching Characteristics
(Notes 2, 8)
+25
8
C
–55
8
C to +125
8
C
LSB
/MSB Select to
Write Set-Up T ime
LSB
/MSB Select to
Write Hold T ime
DAC Select to
Write Set-Up T ime
DAC Select to
Write Hold T ime
LDAC to
Write Set-Up T ime
LDAC to
Write Hold T ime
Data Valid to
Write Set-Up T ime
Data Valid to
Write Hold T ime
Write Pulse Width
LDAC Pulse Width
Reset Pulse Width
t
CBS
130
170
180
80
ns min
t
CBH
0
0
0
0
ns min
t
AS
180
210
220
80
ns min
t
AH
0
0
0
0
ns min
t
LS
120
150
160
80
ns min
t
LH
0
0
0
0
ns min
t
DS
160
210
220
70
ns min
t
DH
t
WR
t
LWD
t
RWD
0
130
100
80
0
150
110
90
0
170
130
90
10
90
60
60
ns min
ns min
ns min
ns min
NOT ES
1
Measured using internal R
FB A
and R
FB B
. Both DAC digital inputs = 1111 1111 1111.
1
2
Guaranteed and not tested.
1
3
Gain T C is measured from +25
°
C to T
or from +25
°
C to T
MAX
.
1
4
Absolute T emperature Coefficient is approximately +50 ppm/
°
C.
1
5
From 50% of digital input to 90% of final analog output current. V
REF A
= V
REF B
= +10 V; OUT A, OUT B load = 100
, C
EX T
= 13 pF.
1
6
WR
,
LDAC
= 0 V; DB0–DB7 = 0 V to V
or V
to 0 V.
1
7
Settling time is measured from 50% of the digital input change to where the output settles within 1/2 LSB of full scale.
1
8
See T iming Diagram.
1
9
T hese limits apply for the commercial and industrial grade products.
10
T hese limits also apply as typical values for V
DD
= +12 V with +5 V CMOS logic levels and T
A
= +25
°
C.
Specifications subject to change without notice.
Burn-In Circuit
DAC8248
–3–
REV. B
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