L + IOUT
參數(shù)資料
型號(hào): DAC5674IPHPG4
廠商: Texas Instruments
文件頁(yè)數(shù): 20/39頁(yè)
文件大?。?/td> 0K
描述: IC DAC 14BIT 400MSPS 48-HTQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 250
系列: CommsDAC™
設(shè)置時(shí)間: 20ns
位數(shù): 14
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 550mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-HTQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 400M
配用: 296-30860-ND - EVAL MODULE FOR DAC5674
DAC5674
SLWS148A SEPTEMBER 2003 REVISED OCTOBER 2005
www.ti.com
27
VOUT1
+ IOUT1
R
L + IOUTFS
CODE
16384
R
L
VOUT2
+ IOUT2
R
L + IOUTFS
16383
* CODE
16384
R
L
The differential output voltage VOUTDIFF can thus be expressed as:
VOUT
DIFF + VOUT1 * VOUT2 + IOUTFS
2CODE
* 16383
16384
R
L
The latter equation shows that applying the differential output results in doubling of the signal power delivered
to the load. Because the output currents IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Note that care should be taken not to exceed the compliance voltages at node IOUT1
and IOUT2, which would lead to increased signal distortion.
Reference Operation
The DAC5674 comprises a band-gap reference and control amplifier for biasing the full-scale output current.
The full-scale output current is set by applying an external resistor RBIAS. The bias current IBIAS through resistor
RBIAS is defined by the on-chip band-gap reference voltage and control amplifier. The full-scale output current
equals 32 times this bias current. The full-scale output current IOUTFS can thus be expressed as:
IOUT
FS +
32
I
BIAS +
32
V
EXTIO
R
BIAS
where VEXTIO is the voltage at terminal EXTIO. The band-gap reference voltage delivers an accurate voltage
of 1.2 V. This reference is active when terminal EXTLO is connected to AGND. An external decoupling capacitor
CEXT of 0.1 F should be connected externally to terminal EXTIO for compensation. The band-gap reference
can additionally be used for external reference operation. In that case, an external buffer with high impedance
input should be applied in order to limit the band-gap load current to a maximum of 100 nA. The internal
reference can be disabled and overridden by an external reference by connecting EXTLO to AVDD. In this case,
capacitor CEXT can be omitted. Terminal EXTIO serves as either input or output node.
The full-scale output current can be adjusted from 20 mA to 2 mA by varying resistor RBIAS or changing the
externally applied reference voltage. The internal control amplifier has a wide input range, supporting the
full-scale output current range of 20 mA.
Analog Current Outputs
Figure 34 shows a simplified schematic of the current source array output with corresponding switches.
Differential switches direct the current of each individual PMOS current source to either the positive output node
IOUT1 or its complementary negative output node IOUT2. The output impedance is determined by the stack
of the current sources and differential switches, and is typically >300 k
in parallel with an output capacitance
of 5 pF.
The external output resistors are referred to an external ground. The minimum output compliance at nodes
IOUT1 and IOUT2 is limited to 1 V, determined by the CMOS process. Beyond this value, transistor breakdown
may occur resulting in reduced reliability of the DAC5674 device. The maximum output compliance voltage at
nodes IOUT1 and IOUT2 equals 1.25 V. Exceeding the maximum output compliance voltage adversely affects
distortion performance and integral nonlinearity. The optimum distortion performance for a single-ended or
differential output is achieved when the maximum full-scale signal at IOUT1 and IOUT2 does not exceed 0.5 V.
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