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參數(shù)資料
| 型號： | DAC2932PFBTG4 |
| 元件分類： | DAC |
| 英文描述： | DUAL 12-BIT 40MSPS DIGITAL TO ANALOG CONVERTER |
| 中文描述： | 雙通道12位40MSPS數(shù)模轉(zhuǎn)換器 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 343K |
| 代理商： | DAC2932PFBTG4 |
SBAS279C AUGUST 2003 REVISED OCTOBER 2004
www.ti.com
5
ELECTRICAL CHARACTERISTICS: V-DAC
At TA = TMIN to TMAX (typical values are at TA = 25
°
C), +VAV = +3V, +VDV = +3V, RL = 2k
to GND, and CL = 40pF, unless otherwise noted.
DAC2932
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNITS
Static Performance(1)
Resolution
Relative accuracy
Differential nonlinearity, DNL
Zero code error(2)
Full-scale error(2)
Zero code error drift
Full-scale error drift
Output Characteristics(3)
Reference voltage setting, REFV
Output voltage settling time
12
±
8
±
0.2
0.2
3
5
15
Bits
LSB
LSB
%FSR
%FSR
μ
V/
°
C
ppmFSR/
°
C
At 25
°
C
16
1
+16
+1
+0.8
+2
Tested; monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
10
0
+VAV
V
μ
s
μ
s
V/
μ
s
pF
nV-s
nV-s
mA
μ
s
1/4 scale to 3/4 scale change (400h to C00h)
CL = 470pF
3
5
1
Slew rate
Capacitive load stability
Code change glitch impulse
Digital feedthrough
DC output impedance
Short-circuit current
Power-up time
Logic Inputs(3)
Input current
Input low voltage, VIL
Input high voltage, VIH
Input capacitance
RL = 2k
470
11
0.5
4
20
8
1LSB change around major carry
Coming out of power-down mode
±
1
0
3
5
μ
A
V
V
pF
0.8
2
(1)Linearity calculated using a reduced code range of 48 to 3976.
(2)Full-scale range (FSR) based on reference REFV = +VAV = +3.0V.
(3)Ensured by design and characterization; not production tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DAC2932 | DUAL 12-BIT 40MSPS DIGITAL TO ANALOG CONVERTER |
| DAC2932PFBR | DUAL 12-BIT 40MSPS DIGITAL TO ANALOG CONVERTER |
| DAC2932PFBT | DUAL 12-BIT 40MSPS DIGITAL TO ANALOG CONVERTER |
| DAC312BR | 12-Bit Digital-to-Analog Converter |
| DAC312GBC | 12-Bit Digital-to-Analog Converter |
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