參數(shù)資料
型號(hào)： DAC1008D750HN
廠(chǎng)商： NXP Semiconductors N.V.
元件分類(lèi)： 外設(shè)及接口
英文描述： Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
封裝： DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁(yè)數(shù)： 30/99頁(yè)
文件大?。?/td> 547K
代理商： DAC1008D750HN
DAC1008D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 5 January 2011
30 of 99
NXP Semiconductors
DAC1008D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
10.9 Full-scale current
10.9.1
Regulation
The DAC1008D750 reference circuitry integrates an internal bandgap reference voltage
which delivers a 1.25 V reference to the GAPOUT pin. It is recommended to decouple pin
GAPOUT using a 100 nF capacitor.
The reference current is generated via an external resistor of 909
Ω
(1 %) connected to
pin VIRES. A control amplifier sets the appropriate full-scale current (I
O(fs)
) for both DACs
(see
Figure 17
).
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
10.9.1.1
External regulation
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with bit GAP_PD (register 00h[0]; see
Table 18 “COMMON register (address 00h) bit
description”
).
10.9.2
Full-scale current adjustment
The default full-scale current (I
O(fs)
) is 20 mA but further adjustments can be made by the
user to both DACs independently using the serial interface from 1.6 mA to 22 mA,
±
10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (register 0Ah; see
Table 28
“DAC_A_CFG_2 register (address 0Ah) bit description”
and register 0Bh; see
Table 29
“DAC_A_CFG_3 register (address 0Bh) bit description”
) and DAC_B_GAIN COARSE[3:0]
(register 0Dh; see
Table 31 “DAC_B_CFG_2 register (address 0Dh) bit description”
and
register 0Eh; see
Table 32 “DAC_B_CFG_3 register (address 0Eh) bit description”
) define
the coarse variation of the full-scale current (see
Table 13
).
Fig 17. Internal reference configuration
001aaj816
REF.
BANDGAP
GAPOUT
VIRES
DAC
CURRENT
SOURCES
ARRAY
AGND
AGND
100 nF
909
Ω
(1 %)
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