參數(shù)資料
型號: DAC1008D750HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Dual 10-bit DAC; up to 750 Msps; 2×, 4× or 8× interpolating
封裝: DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1008D750HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù): 11/99頁
文件大?。?/td> 547K
代理商: DAC1008D750HN
DAC1008D750
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 5 January 2011
11 of 99
NXP Semiconductors
DAC1008D750
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A
[1]
D = guaranteed by design; C = guaranteed by characterization; I = 100 % industrially tested.
[2]
Delay between the deassertion of bits FORCE_RESET_FCLK and FORCE_RESET_DCLK and the deassertion of the sync signal. It
reflects the delay required by DAC1008D750 to lock to a JESD204A stream. It supposes that the TX is already transmitting
K28.5 characters in error-free conditions.
[3]
CLKINP/CLKINN inputs are at differential LVDS levels. An external termination resistor with a value of between 80
Ω
and 120
Ω
(see
Figure 15
) should be connected across the pins.
[4]
|
V
gpd
|
represents the ground potential difference voltage. This is the voltage that results from current flowing through the finite resistance
and the inductance between the receiver and the driver circuit ground voltage.
[5]
Vin_p and Vin_n inputs are differential CML inputs. They are terminated internally to V
tt
via 50
Ω
(see
Figure 4
).
SYNC_OUTP/SYNC_OUTN outputs are differential LVDS outputs. They must be terminated by a resistor with a value of between 80
Ω
and 120
Ω
.
Optimum performances at high sampling rate (> 650 Msps) will be achieved with V
DDA(1V8)
= 1.8 V
±
2 %
IMD3 rejection with
6 dBFS/tone.
[6]
[7]
[8]
ACPR
adjacent channel
power ratio
NCO on;
interpolation;
f
s
= 737.28 Msps; f
o
= 96
MHz
1 carrier; BW = 5 MHz
2 carriers; BW = 10 MHz
4 carriers; BW = 20 MHz
NCO on; 4
×
interpolation;
f
s
= 737.28 Msps; f
o
= 153.6
MHz
1 carrier; BW = 5 MHz
2 carriers; BW = 10 MHz
4 carriers; BW = 20 MHz
f
s
= 737.28 Msps;
4
×
interpolation;
f
o
= 153.6 MHz at 0 dBFS
[7]
C
C
C
-
-
-
67
64
60
-
-
-
dBc
dBc
dBc
[7]
C
C
C
I
-
-
-
67
64
59
145
-
-
-
-
dBc
dBc
dBc
dBm/Hz
NSD
noise spectral density
[7]
-
Table 5.
V
DDA(1V8)
= V
DDD
= 1.7 V to 1.9 V; V
DDA(3V3)
= 3.13 V to 3.47 V; AGND and GND are shorted together; T
amb
=
40
°
C to
+85
°
C; typical values measured at V
DDA(1V8)
= V
DDD
= 1.8 V; V
DDA(3V3)
= 3.3 V; T
amb
= +25
°
C; R
L
= 50
Ω
; I
O(fs)
= 20 mA;
maximum sample rate; PLL off unless otherwise specified.
Symbol
Parameter
Conditions
Characteristics
…continued
Test
[1]
Min
Typ
Max
Unit
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