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參數(shù)資料
| 型號： | D2-24044-MR |
| 廠商： | Intersil |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL AMP AUDIO PWR D 38HTSSOP |
| 標準包裝： | 50 |
| 系列： | D2Audio™ |
| 類型： | D 類 |
| 輸出類型： | 2-通道（立體聲）或 4 通道（四路） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 30W x 2 @ 8 歐姆 |
| 電源電壓： | 9 V ~ 26 V |
| 安裝類型： | 表面貼裝 |
| 供應商設備封裝： | 38-HTSSOP |
| 封裝/外殼： | 38-TFSOP （0.173"，4.40mm 寬）裸露焊盤 |
| 包裝： | 管件 |
19
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7678.0
September 3, 2010
For additional products, see www.intersil.com/product_tree
4-Channel Half-Bridge Example
This example (Figure 17) uses configuration mode “11”
to provide four independent half-bridge loudspeaker
output channels. The PWM controller provides input into
all eight PWM input pins.
1
2
3
4
5
6
7
8
9
10
11
12
38
37
36
35
34
33
32
28
27
26
25
24
23
13
14
15
16
17
31
30
29
OUTB
HSBSA
HSBSB
HGNDB
HVDDB
REG5V
VDDHV
IREF
HVDDC
HGNDC
OUTC
HSBSC
HSBSD
OUTD
HGNDD
HVDDD
18
19
nPDN
OUTA
PWMGND
HGNDA
HVDDA
nOVRT
PWMVDD
OCFG0
OCFG1
22
21
20
+HV
GND
100K
0.1u
1u
PWMVDD/+3.3
10k
nPDN
10k
nOVRT
PWM Inputs From
PWM/System Controller
nERROR Reporting to
PWM/System Controller
Configuration “11”
4x Half Bridge Outputs
D2-24044
Channel 1
Half Bridge
Output
Filter
Bias
+HV
Channel 2
Half Bridge
Output
Filter
Bias
+HV
Channel 3
Half Bridge
Output
Filter
Bias
+HV
Half Bridge
Output
Filter
Bias
+HV
Channel 4
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWMGND2
PWM2
PWM1
nERRORA
nERRORB
nERRORC
nERRORD
Channel 3
Channel 2
Channel 1
For Channel 1 Output
For Channel 3 Output
For Channel 2 Output
PWMIN2-HI
PWMIN2-LO
PWMIN1-LO
PWMIN1-HI
PWMIN3-HI
PWMIN3-LO
Channel 3
PWMIN4-HI
PWMIN4-LO
For Channel 4 Output
FIGURE 17. 4-CHANNEL HALF BRIDGE EXAMPLE
D2-24044
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