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參數(shù)資料
| 型號： | CYW2330 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 諧振器 |
| 英文描述： | Dual Serial Input PLL with 2.5-GHz and 600-MHz Prescalers |
| 中文描述： | DUAL PRESCALER, PDSO20 |
| 封裝： | 0.173 INCH, MO-153, TSSOP-20 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 228K |
| 代理商： | CYW2330 |
PRELIMINARY
Dual Serial Input PLL with 2.5-GHz and 600-MHz Prescalers
CYW2330
Cypress Semiconductor Corporation
Document #: 38-07239 Rev. **
3901 North First Street
San Jose
CA 95134
Revised September 27, 2001
408-943-2600
30
Features
Operating voltage: 2.7 V to 5.5 V
PLL1 operating frequency:
—2.5 GHz with prescaler ratios of 32/33 and 64/65
PLL2 operating frequency:
—600 MHz with prescaler ratios of 8/9 and 16/17
Lock detect feature
Available in a 20-pin TSSOP (Thin Shrink Small Outline
Package)
Available in a 24-pin CSP (Chip Scale Package)
Available in a 20-pin MLF
(Mirco Lead Frame Package)
Applications
The Cypress CYW2330 is a dual serial input PLL frequency
synthesizer which includes a 2.5-GHz RF and a 600-MHz IF
dual modulus prescaler to combine the RF and IF mixer fre-
quency sections of wireless communication systems. The syn-
thesizer is designed for cordless/cellular telephone systems,
cable TV tuners, WLANs and other wireless communication
systems. The device operates from 2.7 V and dissipates only
24 mW.
CYW2330 Dual Hi-Lo PLL Block Diagram
Pin Configuration
V
CC
2
V
P
2
D
O
PLL2
GND
F
IN
2
F
IN
2#
GND
LE
DATA
CLOCK
20
19
18
17
16
15
14
13
12
11
V
CC
1
V
P
1
D
O
PLL1
GND
F
IN
1
F
IN
1#
GND
OSC_IN
GND
F
O
/LD
1
2
3
4
5
6
7
8
9
10
Binary 6-Bit
Swallow Counter
Prescaler
32/33 or
64/65
Phase
Detector
Latch
PPLL1
Binary 11-Bit
Programmable Counter
20-Bit Latch
20-Bit Latch
Prescaler
8/9 or
16/17
Cntrl 22-Bit
Shift
Reg.
Binary 4-Bit
Swallow Counter
Binary 11-Bit
Programmable Counter
Latch
PPLL2
Refer15-Bit
Refer15-Bit
Phase
Detector
Charge
Pump
fr fp
Monitor
Output
Selector
Charge
Pump
Power
Control
GND (17)
V
P
2 (19)
GND (9)
GND (14)
GND (4)
GND (7)
V
CC
1 (1)
V
CC
2 (20)
F
IN
1 (5)
F
IN
1# (6)
OSC_IN (8)
LE (13)
DATA (12)
CLOCK (11)
F
IN
2 (16)
F
IN
2# (15)
V
P
1 (2)
D
O
PLL1 (3)
F
O
/LD (10)
D
O
PLL2 (18)
Latch
Selector
fp1
fr1
fr2
fp2
(Top View)
1
2
3
4
5
15
14
13
12
6
7
8
9
1
2
1
1
1
1
11
DoPLL1
GND
Fin1
Fin1#
GND
GND
Fin2
Fin2#
GND
LE
O
G
F
C
D
V
V
V
V
D
(Top View)
4
5
6
7
19
18
17
16
1
1
1
2
2
2
15
3
DoPLL1
GND
Fin1
Fin1#
GND
GND
Fin2
Fin2#
GND
LE
G
F
C
V
V
V
2
1
NC
Vp1
8
9
OSC_IN
NC
14
13
DATA
NC
21
20
NC
DoPLL2
TSSOP
CSP
MLF
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