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參數(shù)資料
| 型號： | CYW15G0403DXB-BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Independent Clock Quad HOTLink II⑩ Transceiver |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, 1.57 MM HEIGHT, BGA-256 |
| 文件頁數(shù)： | 2/45頁 |
| 文件大?。?/td> | 517K |
| 代理商： | CYW15G0403DXB-BGC |
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CYP15G0403DXB
CYV15G0403DXB
CYW15G0403DXB
Document #: 38-02065 Rev. *F
Page 2 of 45
Figure 1. HOTLink II System Connections
The receive (RX) section of the CYP(V)(W)15G0403DXB
Quad HOTLink II consists of four independent byte-wide
channels. Each channel accepts a serial bit-stream from one
of two PECL-compatible differential line receivers, and using
a completely integrated Clock and Data Recovery PLL,
recovers the timing information necessary for data recon-
struction. Each recovered bit-stream is deserialized and
framed into characters, 8B/10B decoded, and checked for
transmission errors. Recovered decoded characters are then
written to an internal Elasticity Buffer, and presented to the
destination host system.
The integrated 8B/10B encoder/decoder may be bypassed for
systems that present externally encoded or scrambled data at
the parallel interface.
The parallel I/O interface may be configured for numerous
forms of clocking to provide the highest flexibility in system
architecture. In addition to clocking the transmit path with a
local reference clock, the receive interface may also be
configured to present data relative to a recovered clock or to a
local reference clock.
Each transmit and receive channel contains an independent
BIST pattern generator and checker. This BIST hardware
allows at-speed testing of the high-speed serial data paths in
each transmit and receive section, and across the intercon-
necting links.
The CYP(V)(W)15G0403DXB is ideal for port applications
where different data rates and serial interface standards are
necessary for each channel. Some applications include
multi-protocol routers, aggregation equipment, and switches.
S
Serial Links
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Serial Links
Serial Links
Serial Links
Backplane or
Cabled
Connections
Independent
CYP(V)(W)15G0403DXB
CYP(V)(W)15G0403DXB
Independent
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYW15G0403DXB-BGI | 功能描述:電信線路管理 IC Quad Indep CH XCVR IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYW15G0403DXB-BGXC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver |
| CYW15G0403DXB-BGXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver |
| CYW15GO403DXB-BGI | 制造商:Cypress Semiconductor 功能描述: |
| CYW170-01SXC | 功能描述:時鐘緩沖器 133MHz Clock RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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