參數(shù)資料
型號: CYS25G0101DX-ATXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SONET OC-48 Transceiver
中文描述: TRANSCEIVER, PQFP120
封裝: 14 X 14 MM, 1.40 MM HEIGHT, LEAD FREE, TQFP-120
文件頁數(shù): 4/17頁
文件大?。?/td> 291K
代理商: CYS25G0101DX-ATXC
CYS25G0101DX
Document Number: 38-02009 Rev. *K
Page 4 of 17
Pin Configuration
The pin configuration for 120-pin Thin Quad Flatpack follows.
[1, 2]
16
24
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
61
62
63
64
75
65
9
9
9
9
9
9
9
9
9
LFI
RESET
VSSN
SD
VDDQ
NC
NC
TXD[11]
TXD[10]
TXD[9]
TXD[8]
TXD[7]
TXD[6]
TXD[5]
TXD[4]
VSSQ
VCCN
VSSN
VCCQ
TXD[2]
TXD[1]
TXD[0]
VSSN
VDDQ
TXCLKO
VSSN
VCCN
PWRDN
LOOPTIME
NC
REFCLK–
REFCLK+
VSSQ
VCCQ
NC
N
N
N
N
CYS25G0101DX
Top View
VSSN
VSSN
N
N
N
15
23
28
29
30
76
70
69
68
67
66
1
2
3
4
5
6
7
8
9
10
11
12
13
14
17
18
19
20
21
22
25
26
27
90
89
88
87
86
85
84
83
82
81
80
79
78
77
74
73
72
71
1
1
1
1
1
VCCN
RXD[4]
RXD[5]
RXD[6]
RXD[7]
VSSN
VDDQ
RXCLK
VSSN
NC
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DIAGLOOP
LINELOOP
LOOPA
VSSN
LOCKREF
RXD[0]
RXD[1]
RXD[2]
RXD[3]
VSSN
VDDQ
NC
V
N
N
V
V
R
R
R
R
R
R
R
R
V
V
V
V
F
F
T
T
T
T
T
V
V
V
TXD[3]
V
V
V
V
V
V
O
O
V
C
V
I
I
V
V
V
*
V
*
V
*
R
R
R
R
V
V
V
V
Figure 2. 120-Pin Thin Quad Flatpack Pin Configuration
Notes
1. No connect (NC) pins are left unconnected or floating. Connecting any of these pins to the positive or negative power supply causes improper operation or failure of
the device.
2. Pins 113 and 119 are either no connect or VSSQ. Use VSSQ for compatibility with next generation of OC-48 SERDES devices. Pin 116 are either no connect or VCCQ.
Use VCCQ for compatibility with next generation of OC-48 SERDES devices.
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