參數(shù)資料
型號(hào)： CYP15G0401DXB
廠商： Cypress Semiconductor Corp.
英文描述： PREMIUM VGA CABLE W/AUDIO3FT, HD15 & 3.5MM M-M
中文描述： 四HOTLink II收發(fā)器
文件頁(yè)數(shù)： 7/48頁(yè)
文件大?。?/td> 1115K
代理商： CYP15G0401DXB
CYP15G0401DXA
PRELIMINARY
Document #: 38-02002 Rev. *B
Page 7 of 48
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature..................................
–
65
°
C to +150
°
C
Ambient Temperature with
Power Applied.............................................
–
55
°
C to +125
°
C
Supply Voltage to Ground Potential...............
–
0.5V to +4.2V
DC Voltage Applied to LVTTL Outputs
in High-Z State.........................................
–
0.5V to V
CC
+0.5V
Output Current into LVTTL Outputs (LOW)..................30 mA
DC Input Voltage .....................................
–
0.5V to V
CC
+0.5V
Static Discharge Voltage
...............................................>
2001 V
(per MIL-STD-883, Method 3015)
Latch-Up Current
...........................................................>
200 mA
Operating Range
Range
Ambient
Temperature
0
°
C to +70
°
C
–
40
°
C to +85
°
C
V
CC
Commercial
Industrial
+3.3V
+
5%/
–
5%
+3.3V
+
5%/
–
5%
Pin Descriptions
CYP15G0401DXA Quad HOTLink II Transceiver
Name
I/O Characteristics
Signal Description
Transmit Path Data Signals
TXPERA
TXPERB
TXPERC
TXPERD
LVTTL Output,
changes relative to
REFCLK
↑
[1]
Transmit Path Parity Error. Active HIGH. Asserted (HIGH) if parity checking is enabled
and a parity error is detected at the encoder. This output is HIGH for one transmit
character clock period to indicate detection of a parity error in the character presented
to the encoder.
If a parity error is detected, the character in error is replaced with a C0.7 character to
force a corresponding bad-character detection at the remote end of the link. This re-
placement takes place regardless of the encoded/non-encoded state of the interface.
When BIST is enabled for the specific transmit channel, BIST progress is presented on
these outputs. Once every 511 character times (plus a 16-character Word Sync Se-
quence when the receive channels are clocked by a common clock), the associated
TXPERx signal will pulse HIGH for one transmit-character clock period to indicate a
complete pass through the BIST sequence.
These outputs also provide indication of a transmit Phase-Align Buffer underflow or
overflow. When the transmit Phase-Align Buffers are enabled (TXCKSEL
≠
LOW, or
TXCKSEL = LOW and TXRATE = HIGH), if an underflow or overflow condition is detect-
ed, TXPERx for the channel in error is asserted and remains asserted until either an
atomic Word Sync Sequence is transmitted or TXRST is sampled LOW to re-center the
transmit Phase-Align Buffers.
Transmit Control. These inputs are captured on the rising edge of the transmit interface
clock (selected by TXCKSEL) and are passed to the encoder or transmit shifter. They
identify how the associated TXDx[7:0] characters are interpreted. When the encoder is
bypassed, these inputs are interpreted as data bits. When the encoder is enabled, these
inputs determine if the TXDx[7:0] character is encoded as Data, a Special Character
code, or replaced with other Special Character codes. See
Table 1
for details.
Transmit Data Inputs. These inputs are captured on the rising edge of the transmit
interface clock (selected by TXCKSEL) and passed to the encoder or transmit shifter.
When the encoder is enabled (TXMODE[1:0]
≠
LL), TXDx[7:0] specify the specific data
or command character to be sent.
TXCTA[1:0]
TXCTB[1:0]
TXCTC[1:0]
TXCTD[1:0]
LVTTL Input,
synchronous,
sampled by the
selected TXCLKx
↑
or REFCLK
↑
[1]
TXDA[7:0]
TXDB[7:0]
TXDC[7:0]
TXDD[7:0]
LVTTL Input,
synchronous,
sampled by the
selected TXCLKx
↑
or REFCLK
↑
[1]
LVTTL Input,
synchronous,
internal pull-up,
sampled by the
respective TXCLKx
↑
or REFCLK
↑
[1]
TXOPA
TXOPB
TXOPC
TXOPD
Transmit Path Odd Parity. When parity checking is enabled (PARCTL
≠
LOW), the parity
captured at these inputs is XORed with the data on the associated TXDx bus to verify
the integrity of the captured character.
Note:
1.
When REFCLK is configured for half-rate operation (TXRATE = HIGH), these inputs are sampled (or the outputs change) relative to both the rising and falling
edges of REFCLK.
相關(guān)PDF資料
PDF描述
CYP15G0401DXB-BGC PREMIUM VGA CABLE W/AUDIO5FT, HD15 & 3.5MM M-M
CYP15G0401DXB-BGI Quad HOTLink II Transceiver
CYP15G0401DXA-BGC Quad HOTLink II Transceiver
CYP15G0401DXA-BGI Quad HOTLink II Transceiver
CYRF6936 WirelessUSB LP 2.4GHz Radio SoC(WirelessUSB LP 2.4GHz無(wú)線SoC)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0401DXB_05 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Quad HOTLink II⑩ Transceiver
CYP15G0401DXB-BGC 功能描述:電信線路管理 IC Dual Channel XCVR 1.5Gbps Bckplane COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0401DXB-BGI 功能描述:電信線路管理 IC Dual Channel XCVR 1.5Gbps Bckplane IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0401DXB-BGXC 功能描述:電信線路管理 IC Dual Channel XCVR 1.5Gbps Bckplane COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0401DXB-BGXCKG 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*