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參數(shù)資料
| 型號： | CYNSE70032-66BGC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Network Search Engine |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA272 |
| 封裝： | 27 X 27 MM, 2.33 MM HEIGHT, BGA-272 |
| 文件頁數(shù)： | 13/126頁 |
| 文件大小： | 3333K |
| 代理商： | CYNSE70032-66BGC |
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CYNSE70032
Document #: 38-02042 Rev. *E
Page 13 of 126
6.0
Clocks
The CYNSE70032 device receives the CLK2X and PHS_L signals. It uses the PHS_L signal to divide CLK2X and generate an
internal clock (CLK
[3]
), as shown in
Figure 6-1
. The CYNSE70032 device uses CLK2X and CLK for internal operations.
7.0
Registers
All registers in the CYNSE70032 are 68 bits wide. The CYNSE70032 device contains sixteen pairs of comparand storage
registers, eight pairs of GMRs, eight search successful index registers and one each of command, information, burst Read, burst
Write, and next-free address registers.
Table 7-1
provides an overview of all the CYNSE70032 registers. The registers are listed
in ascending address order. Each register group is then described in the subsections that follow.
7.1
The device contains 32 68-bit comparand registers (sixteen pairs) dynamically selected in every Search operation to store the
comparand presented on the DQ bus. The Learn command will later use these registers when it is executed. The CYNSE70032
device stores the Search command’s cycle A comparand in the even-numbered register and its cycle B comparand in the
odd-numbered register, as shown in
Figure 7-1
.
68
index
0
1
Comparand Registers
Notes:
3.
4.
Any reference to “CLK” cycles means one cycle of CLK.
.“CLK” is an internal clock signal.
Table 7-1. Register Overview
Address
0–31
Abbreviation
COMP0–31
Type
R
Name
Sixteen pairs of comparand registers that store comparands from the DQ bus
for learning later.
Eight GMR pairs.
Eight search successful index registers.
Command register.
Information register.
Burst Read register.
Burst Write register.
Next-free address register.
Reserved.
32–47
48–55
56
57
58
59
60
61–63
MASKS
SSR0–7
COMMAND
INFO
RBURREG
WBURREG
NFA
–
RW
R
RW
R
RW
RW
R
–
CLK2X
PHS_L
Figure 6-1. CYNSE70032 Clocks (CLK2X and PHS_L)
CLK
[4]
135
0
68
1
3
5
7
0
2
4
6
30
31
15
Address
Figure 7-1. Comparand Register Selection during Search and Learn Instructions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYNSE70032-66BGI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Network Search Engine |
| CYNSE70032-83BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Network Search Engine |
| CYNSE70064-50BGC | 制造商:Cypress Semiconductor 功能描述: |
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