參數(shù)資料
型號(hào): CYII4SC1300AA-QSC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 圖像傳感器
英文描述: 1.3 MPxl Rolling Shutter CMOS Image Sensor
中文描述: IMAGE SENSOR-CMOS, 1280(H) X 1024(V) PIXEL, 23fps, SQUARE, SURFACE MOUNT
封裝: 0.71 MM HEIGHT, 0.04 INCH PITCH, CERAMIC, LCC-84
文件頁數(shù): 11/37頁
文件大?。?/td> 1168K
代理商: CYII4SC1300AA-QSC
IBIS4-1300
Document Number: 38-05707 Rev. *B
Page 11 of 37
Output amplifier
The output amplifier stage is user-programmable for gain and
offset level. Gain and offset are controlled by 4-bit wide words.
Gain settings are on an exponential scale. Offset is controlled
by a 4-bit wide DAC, which selects the offset voltage between
2 reference voltages (Vhigh_dac & Vlow_dac) on a linear
scale.
The offset setting is independent of the gain setting.
The gain setting is independent of amplifier bandwidth.
The amplifier is designed to match the specifications like the
output of the imager array. This signal has a data rate of 10
MHz and is located between 1.2 and 2.4 V. Table 3.
summarizes the specifications of the amplifier.
The range of the output stage input is between 1 and 4 V. A
lowest gain the sensor outputs a signal in between 1.2 and 2.2
V, which fits into the input range of the amplifier. The range of
the output signal is between 1 and 4.5 V, dependent on the
gain and offset settings of the amplifier. This range should fit
to the input range of the ADC, external or internal. The
on-chip ADC range is between 2 and 4 V. A minimal gain
setting of "3" seems necessary for the internal ADC, and the
offset voltage should be set to the low-reference voltage of the
ADC.
GND_AB
54
Anti-blooming drain control voltage
Default: connect to ground. The anti blooming is operational but
not maximal.
Apply about 1 V DC for improved anti-blooming
Power & ground
VDD_RESETL
59
Power supply for left reset line drivers apply 5 V DC (default) or about
4…4.5 V for dual slope mode
VDD_RESETR
79
Power supply for right (default) reset line drivers 5 V DC
VDD_ARRAY
55
Power supply for the pixel array 5 V DC
VDD
11
34
53
77
Power supply of image sensor core & output amplifier 5 V DC
GND
10
33
52
78
Ground of image sensor core & output amplifier
Table 2. Pins of the image sensor core
Digital controls
Table 3. Summary of output amplifier specifications
Min.
Typ
Max
Gain
1.2 (gain setting 0)
2.7 (setting 4)
16 (setting 15)
Output signal range
1 V
4.5 V
Bandwidth
(40 pF load)
12 MHz
(gain setting 15)
22 MHz
(gain setting 0...8)
33 MHz
(gain setting 0)
Output slew rate
(40 pF load)
40 V/
μ
s
50 V/
μ
s
80 V/
μ
s
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