參數(shù)資料
型號: CYD18S72V18
廠商: Cypress Semiconductor Corp.
英文描述: FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
中文描述: FullFlex器件特別提款權(quán)同步雙端口SRAM(FullFlex器件同步雙端口SRAM的特別提款權(quán))
文件頁數(shù): 2/52頁
文件大?。?/td> 774K
代理商: CYD18S72V18
FullFlex
Document #: 38-06082 Rev. *F
Page 2 of 52
Notes:
1. The CYD36S18V18 device has 21 address bits. The CYD36S36V18 and the CYD18S18V18 devices have 20 address bits. The CYD36S72V18, CYD18S36V18,
and the CYD09S18V18 devices have 19 address bits. The CYD18S72V18, CYD09S36V18, and the CYD04S18V18 devices have 18 address bits. The
CYD09S72V18 and the CYD04S36V18 devices have 17 address bits. The CYD04S72V18 has 16 address bits.
2. The FullFlex72 family of devices has 72 data lines. The FullFlex36 family of devices has 36 data lines. The FullFlex18 family of devices has 18 data lines.
3. The FullFlex72 family of devices has eight byte enables. The FullFlex36 family of devices has four byte enables. The FullFlex18 family of devices has two byte
enables.
FTSEL
L
CQEN
L
PORTSTD[1:0]
L
DQ[71:0]
L
BE [7:0]
L
CE0
L
CE1
L
OE
L
R/W
L
CQ1
L
FTSEL
R
CQEN
R
PORTSTD[1:0]
R
DQ [71:0]
R
BE [7:0]
R
CE0
R
CE1
R
OE
R
R/W
R
CQ1
R
CQ1
R
CQ0
R
CQ0
R
A [20:0]
L
CNT/MSK
L
ADS
L
CNTEN
L
CNTRST
L
RET
L
CNTINT
L
C
L
WRP
L
A [20:0]
R
CNT/MSK
R
ADS
R
CNTEN
R
CNTRST
R
RET
R
CNTINT
R
C
R
WRP
R
CONFIG Block
CONFIG Block
IO
Control
IO
Control
Address &
Counter Logic
Address &
Counter Logic
INT
L
TRST
TMS
TDI
TDO
TCK
JTAG
MRST
READY
R
LowSPD
R
READY
L
LowSPD
L
RESET
LOGIC
INT
R
BUSY
L
BUSY
R
Mailboxes
Collision Detection Logic
Dual Ported Array
Figure 1. FullFlex72 18-Mbit (CYD18S72V18) Block Diagram
[1, 2, 3]
CQ0
L
CQ0
L
CQ1
L
ZQ0
R
ZQ1
R
ZQ0
L
ZQ1
L
相關(guān)PDF資料
PDF描述
CYD04S72V18 FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
CYD36S72V18 FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
CYD09S72V18 FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
CYD36S18V18 FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
CYD36S36V18 FullFlex Synchronous SDR Dual-Port SRAM(FullFlex同步SDR雙端口SRAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYD18S72V18-167BBXC 功能描述:IC SRAM 18MBIT 167MHZ 256LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M(8Mx32) 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA(8x13) 包裝:帶卷 (TR) 其它名稱:557-1327-2
CYD18S72V18-167BBXI 功能描述:IC SRAM 18MBIT 167MHZ 256LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:移動(dòng) SDRAM 存儲(chǔ)容量:256M(8Mx32) 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA(8x13) 包裝:帶卷 (TR) 其它名稱:557-1327-2
CYD18S72V18-167BGC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (256Kx72) 1.8v 167MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V18-167BGI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (256Kx72) 1.8v 167MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CYD18S72V18-167BGXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (256Kx72) 1.8v 167MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray