參數(shù)資料
型號(hào)： CY8C27143-24PXI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： 外設(shè)及接口
英文描述： PSoC Mixed Signal Array
中文描述： MULTIFUNCTION PERIPHERAL, PDIP8
封裝： 0.300 INCH, LEAD FREE, PLASTIC, DIP-8
文件頁(yè)數(shù)： 20/44頁(yè)
文件大?。?/td> 542K
代理商： CY8C27143-24PXI
August 3, 2004
Document No. 38-12012 Rev. *I
20
CY8C27x43 Final Data Sheet
3. Electrical Specifications
3.3.3
DC Operational Amplifier Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, or 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only.
The Operational Amplifier is a component of both the Analog Continuous Time PSoC blocks and the Analog Switched Cap PSoC
blocks. The guaranteed specifications are measured in the Analog Continuous Time PSoC block. Typical parameters apply to 5V at
25
°
C and are for design guidance only.
Table 3-6. 5V DC Operational Amplifier Specifications
Symbol
V
OSOA
Description
Min
Typ
Max
Units
Notes
Input Offset Voltage (absolute value)
Power = Low, Opamp Bias = High
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = High
Average Input Offset Voltage Drift
–
–
–
–
1.6
1.3
1.2
7.0
10
8
7.5
35.0
mV
mV
mV
μ
V/
o
C
pA
TCV
OSOA
I
EBOA
C
INOA
V
CMOA
Input Leakage Current (Port 0 Analog Pins)
–
20
–
Gross tested to 1
μ
A.
Input Capacitance (Port 0 Analog Pins)
–
4.5
9.5
pF
Package and pin dependent. Temp = 25
o
C.
The common-mode input voltage range is mea-
sured through an analog output buffer. The
specification includes the limitations imposed
by the characteristics of the analog output
buffer.
Specification is applicable at high power. For all
other bias modes (except high power, high
opamp bias), minimum is 60 dB.
Common Mode Voltage Range
Common Mode Voltage Range (high power or high
opamp bias)
0.0
0.5
–
–
Vdd
Vdd - 0.5
V
CMRR
OA
Common Mode Rejection Ratio
Power = Low
Power = Medium
Power = High
Open Loop Gain
Power = Low
Power = Medium
Power = High
High Output Voltage Swing (internal signals)
Power = Low
Power = Medium
Power = High
Low Output Voltage Swing (internal signals)
Power = Low
Power = Medium
Power = High
Supply Current (including associated AGND buffer)
Power = Low, Opamp Bias = Low
Power = Low, Opamp Bias = High
Power = Medium, Opamp Bias = Low
Power = Medium, Opamp Bias = High
Power = High, Opamp Bias = Low
Power = High, Opamp Bias = High
Supply Voltage Rejection Ratio
60
60
60
–
–
dB
G
OLOA
60
60
80
–
–
dB
Specification is applicable at high power. For all
other bias modes (except high power, high
opamp bias), minimum is 60 dB.
V
OHIGHOA
Vdd - 0.2
Vdd - 0.2
Vdd - 0.5
–
–
–
–
–
–
V
V
V
V
OLOWOA
–
–
–
–
–
–
0.2
0.2
0.5
V
V
V
I
SOA
–
–
–
–
–
–
60
150
300
600
1200
2400
4600
–
200
400
800
1600
3200
6400
–
μ
A
μ
A
μ
A
μ
A
μ
A
μ
A
dB
PSRR
OA
0V
≤
V
IN
≤
(Vdd - 2.25) or
(Vdd - 1.25V)
≤
V
IN
≤
Vdd
.
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