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參數(shù)資料
| 型號： | CY8C21634-24AX |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | PSoC Mixed-Signal Array |
| 中文描述： | PSoC混合信號陣列 |
| 文件頁數(shù)： | 3/35頁 |
| 文件大?。?/td> | 376K |
| 代理商： | CY8C21634-24AX |
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April 20, 2005
Document No. 38-12025 Rev. *G
3
CY8C21x34 Final Data Sheet
PSoC Overview
Analog System Block Diagram
The Analog Multiplexer System
The Analog Mux Bus can connect to every GPIO pin. Pins can
be connected to the bus individually or in any combination. The
bus also connects to the analog system for analysis with com-
parators and analog-to-digital converters. An additional 8:1 ana-
log input multiplexer provides a second path to bring Port 0 pins
to the analog array.
Switch control logic enables selected pins to precharge continu-
ously under hardware control. This enables capacitive mea-
surement for applications such as touch sensing. Other
multiplexer applications include:
■
Track pad, finger sensing.
■
Chip-wide mux that allows analog input from any IO pin.
■
Crosspoint connection between any IO pin combinations.
Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems. Addi-
tional resources include a switch mode pump, low voltage
detection, and power on reset. Brief statements describing the
merits of each system resource are presented below.
■
Digital clock dividers provide three customizable clock fre-
quencies for use in applications. The clocks can be routed to
both the digital and analog systems. Additional clocks can be
generated using digital PSoC blocks as clock dividers.
■
The I2C module provides 100 and 400 kHz communication
over two wires. Slave, master, and multi-master modes are
all supported.
■
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
■
An internal 1.3 voltage reference provides an absolute refer-
ence for the analog system, including ADCs and DACs.
■
An integrated switch mode pump (SMP) generates normal
operating voltages from a single 1.2V battery cell, providing a
low cost boost converter.
■
Versatile analog multiplexer system.
PSoC Device Characteristics
Depending on your PSoC device characteristics, the digital and
analog systems can have 16, 8, or 4 digital blocks and 12, 6, or
4 analog blocks. The following table lists the resources
available for specific PSoC device groups. The PSoC device
covered by this data sheet is highlighted below.
ACOL1MUX
ACE00
ACE01
Array
Array Input
Configuration
ASE10
ASE11
X
X
X
X
X
Analog Mux Bus
All IO
ACI0[1:0]
ACI1[1:0]
PSoC Device Characteristics
PSoC Part
Number
D
I
D
R
D
B
A
I
A
O
A
C
A
B
S
S
F
S
CY8C29x66
up to
64
4
16
12
4
4
12
2K
32K
CY8C27x43
up to
44
2
8
12
4
4
12
256
Bytes
16K
CY8C24794
50
1
4
48
2
2
6
1K
16K
CY8C24x23
up to
24
1
4
12
2
2
6
256
Bytes
4K
CY8C24x23A
up to
24
1
4
12
2
2
6
256
Bytes
4K
CY8C21x34
up to
28
1
4
28
0
2
4
a
a.
Limited analog functionality
.
512
Bytes
8K
CY8C21x23
16
1
4
8
0
2
4
a
256
Bytes
4K
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY8C21534 | PSoC Mixed-Signal Array |
| CY8C21234-24LFX | PQ I HIP6W DUET |
| CY8C21434-24LFX | PSoC Mixed-Signal Array |
| CY8C21534-24LFX | PSoC Mixed-Signal Array |
| CY8C21234-24PVX | PSoC Mixed-Signal Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C21634-24C | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC Mixed-Signal Array |
| CY8C21634-24E | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC Mixed-Signal Array |
| CY8C21634-24I | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC Mixed-Signal Array |
| CY8C21634-24LFX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PSoC Mixed-Signal Array |
| CY8C21634-24LFXI | 功能描述:可編程片上系統(tǒng) - PSoC IC MCU 8K FLASH 512B SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:67 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
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