參數(shù)資料
型號(hào)： CY7C68015A-56LFXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： EZ-USB FX2LP USB Microcontroller
中文描述： 8-BIT, EEPROM, 48 MHz, MICROCONTROLLER, QCC56
封裝： 8 X 8 MM, LEAD FREE, MO-220, QFN-56
文件頁(yè)數(shù)： 7/55頁(yè)
文件大小： 1958K
代理商： CY7C68015A-56LFXC
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
Document #: 38-08032 Rev. *G
Page 7 of 55
3.9.2
The 8051 puts itself and the rest of the chip into a power-down
mode by setting PCON.0 = 1. This stops the oscillator and
PLL. When WAKEUP is asserted by external logic, the oscil-
lator restarts, after the PLL stabilizes, and then the 8051
receives a wakeup interrupt. This applies whether or not
FX2LP is connected to the USB.
The FX2LP exits the power-down (USB suspend) state using
one of the following methods:
USB bus activity (if D+/D– lines are left floating, noise on
these lines may indicate activity to the FX2LP and initiate a
wakeup).
External logic asserts the WAKEUP pin
External logic asserts the PA3/WU2 pin.
The second wakeup pin, WU2, can also be configured as a
general purpose I/O pin. This allows a simple external R-C
network to be used as a periodic wakeup source. Note that
WAKEUP is by default active LOW.
Wakeup Pins
3.10
Program/Data RAM
3.10.1
The FX2LP has 16 KBytes of internal program/data RAM,
where PSEN#/RD# signals are internally ORed to allow the
8051 to access it as both program and data memory. No USB
control registers appear in this space.
Two memory maps are shown in the following diagrams:
Figure 3-3
Internal Code Memory, EA = 0
Figure 3-4
External Code Memory, EA = 1.
Size
3.10.2
This mode implements the internal 16-KByte block of RAM
(starting at 0) as combined code and data memory. When
external RAM or ROM is added, the external read and write
strobes are suppressed for memory spaces that exist inside
the chip. This allows the user to connect a 64-KByte memory
without requiring address decodes to keep clear of internal
memory spaces.
Only the
internal
16 KBytes and
scratch pad
0.5 KBytes RAM
spaces have the following access:
USB download
USB upload
Set-up data pointer
I
2
C interface boot load.
Internal Code Memory, EA = 0
3.10.3
The bottom 16 KBytes of program memory is external, and
therefore the bottom 16 KBytes of internal RAM is accessible
only as data memory.
External Code Memory, EA = 1
Figure 3-2. Reset Timing Plots
V
IL
0V
3.3V
3.0V
T
RESET
VCC
RESET#
Power on Reset
T
RESET
VCC
RESET#
V
IL
Powered Reset
3.3V
0V
Table 3-5. Reset Timing Values
Condition
T
RESET
5 ms
Power-on Reset with crystal
Power-on Reset with external
clock
200
μ
s + Clock stability time
Powered Reset
200
μ
s
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CY7C68015A-56LTXCKA 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
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