參數(shù)資料
型號： CY7C68013A-128AXC
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： CAC 2C 2#12 PIN PLUG
中文描述： 8-BIT, EEPROM, 48 MHz, MICROCONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-026, TQFP-128
文件頁數(shù)： 29/55頁
文件大小： 1958K
代理商： CY7C68013A-128AXC
CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
Document #: 38-08032 Rev. *G
Page 29 of 55
E62E 1
E62F 1
E630
H.S.
E630
F.S.
E631
H.S.
E631
F.S
E632
H.S.
E632
F.S
E633
H.S.
E633
F.S
E634
H.S.
E634
F.S
E635
H.S.
E635
F.S
E636
H.S.
E636
F.S
E637
H.S.
E637
F.S
ECC2B1
ECC2B2
EP2FIFOPFH
[11]
EP2FIFOPFH
[11]
EP2FIFOPFL
[11]
EP2FIFOPFL
[11]
EP4FIFOPFH
[11]
EP4FIFOPFH
[11]
EP4FIFOPFL
[11]
EP4FIFOPFL
[11]
EP6FIFOPFH
[11]
EP6FIFOPFH
[11]
EP6FIFOPFL
[11]
EP6FIFOPFL
[11]
EP8FIFOPFH
[11]
EP8FIFOPFH
[11]
EP8FIFOPFL
[11]
EP8FIFOPFL
[11]
reserved
EP2ISOINPKTS
ECC2 Byte 1 Address
ECC2 Byte 2 Address
Endpoint 2 / slave FIFO
Programmable Flag H
Endpoint 2 / slave FIFO
Programmable Flag H
Endpoint 2 / slave FIFO
Programmable Flag L
Endpoint 2 / slave FIFO
Programmable Flag L
Endpoint 4 / slave FIFO
Programmable Flag H
Endpoint 4 / slave FIFO
Programmable Flag H
Endpoint 4 / slave FIFO
Programmable Flag L
Endpoint 4 / slave FIFO
Programmable Flag L
Endpoint 6 / slave FIFO
Programmable Flag H
Endpoint 6 / slave FIFO
Programmable Flag H
Endpoint 6 / slave FIFO
Programmable Flag L
Endpoint 6 / slave FIFO
Programmable Flag L
Endpoint 8 / slave FIFO
Programmable Flag H
Endpoint 8 / slave FIFO
Programmable Flag H
Endpoint 8 / slave FIFO
Programmable Flag L
Endpoint 8 / slave FIFO
Programmable Flag L
LINE7
COL5
DECIS
LINE6
COL4
PKTSTAT
LINE5
COL3
IN:PKTS[2]
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
LINE4
COL2
IN:PKTS[1]
OUT:PFC11
LINE3
COL1
IN:PKTS[0]
OUT:PFC10
LINE2
COL0
0
LINE1
0
PFC9
LINE0
0
PFC8
00000000 R
00000000 R
10001000 bbbbbrbb
1
1
DECIS
PKTSTAT
PFC9
IN:PKTS[2]
OUT:PFC8
PFC0
10001000 bbbbbrbb
1
PFC7
PFC6
PFC5
PFC4
PFC3
PFC2
PFC1
00000000 RW
1
IN:PKTS[1]
OUT:PFC7
DECIS
IN:PKTS[0]
OUT:PFC6
PKTSTAT
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
1
0
IN: PKTS[1]
OUT:PFC10
OUT:PFC10 OUT:PFC9 0
IN: PKTS[0]
OUT:PFC9
0
0
PFC8
10001000 bbrbbrrb
1
DECIS
PKTSTAT
0
0
PFC8
10001000 bbrbbrrb
1
PFC7
PFC6
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
1
IN: PKTS[1]
OUT:PFC7
DECIS
IN: PKTS[0]
OUT:PFC6
PKTSTAT
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
1
IN:PKTS[2]
OUT:PFC12
OUT:PFC12 OUT:PFC11 OUT:PFC10 0
IN:PKTS[1]
OUT:PFC11
IN:PKTS[0]
OUT:PFC10
0
PFC9
PFC8
00001000 bbbbbrbb
1
DECIS
PKTSTAT
PFC9
IN:PKTS[2]
OUT:PFC8
PFC0
00001000 bbbbbrbb
1
PFC7
PFC6
PFC5
PFC4
PFC3
PFC2
PFC1
00000000 RW
1
IN:PKTS[1]
OUT:PFC7
DECIS
IN:PKTS[0]
OUT:PFC6
PKTSTAT
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
1
0
IN: PKTS[1]
OUT:PFC10
OUT:PFC10 OUT:PFC9 0
IN: PKTS[0]
OUT:PFC9
0
0
PFC8
00001000 bbrbbrrb
1
DECIS
PKTSTAT
0
0
PFC8
00001000 bbrbbrrb
1
PFC7
PFC6
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
1
IN: PKTS[1]
OUT:PFC7
IN: PKTS[0]
OUT:PFC6
PFC5
PFC4
PFC3
PFC2
PFC1
PFC0
00000000 RW
8
E640 1
EP2 (if ISO) IN Packets
per frame (1-3)
EP4 (if ISO) IN Packets
per frame (1-3)
EP6 (if ISO) IN Packets
per frame (1-3)
EP8 (if ISO) IN Packets
per frame (1-3)
AADJ
0
0
0
0
0
INPPF1
INPPF0
00000001 brrrrrbb
E641 1
EP4ISOINPKTS
AADJ
0
0
0
0
0
INPPF1
INPPF0
00000001 brrrrrrr
E642 1
EP6ISOINPKTS
AADJ
0
0
0
0
0
INPPF1
INPPF0
00000001 brrrrrbb
E643 1
EP8ISOINPKTS
AADJ
0
0
0
0
0
INPPF1
INPPF0
00000001 brrrrrrr
E644 4
E648 1
E649 7
reserved
INPKTEND
[11]
OUTPKTEND
[11]
INTERRUPTS
EP2FIFOIE
[11]
EP2FIFOIRQ
[11,12]
Force IN Packet End
Force OUT Packet End
Skip
Skip
0
0
0
0
0
0
EP3
EP3
EP2
EP2
EP1
EP1
EP0
EP0
xxxxxxxx
xxxxxxxx
W
W
E650 1
Endpoint 2 slave FIFO
Flag Interrupt Enable
Endpoint 2 slave FIFO
Flag Interrupt Request
Endpoint 4 slave FIFO
Flag Interrupt Enable
Endpoint 4 slave FIFO
Flag Interrupt Request
Endpoint 6 slave FIFO
Flag Interrupt Enable
Endpoint 6 slave FIFO
Flag Interrupt Request
Endpoint 8 slave FIFO
Flag Interrupt Enable
Endpoint 8 slave FIFO
Flag Interrupt Request
IN-BULK-NAK Interrupt
Enable
IN-BULK-NAK interrupt
Request
Endpoint Ping-NAK / IBN
Interrupt Enable
Endpoint Ping-NAK / IBN
Interrupt Request
USB Int Enables
USB Interrupt Requests
Endpoint Interrupt
Enables
Endpoint Interrupt
Requests
GPIF Interrupt Enable
0
0
0
0
EDGEPF
PF
EF
FF
00000000 RW
E651 1
0
0
0
0
0
PF
EF
FF
00000000 rrrrrbbb
E652 1
EP4FIFOIE
[11]
EP4FIFOIRQ
[11,12]
0
0
0
0
EDGEPF
PF
EF
FF
00000000 RW
E653 1
0
0
0
0
0
PF
EF
FF
00000000 rrrrrbbb
E654 1
EP6FIFOIE
[11]
EP6FIFOIRQ
[11,12]
0
0
0
0
EDGEPF
PF
EF
FF
00000000 RW
E655 1
0
0
0
0
0
PF
EF
FF
00000000 rrrrrbbb
E656 1
EP8FIFOIE
[11]
EP8FIFOIRQ
[11,12]
0
0
0
0
EDGEPF
PF
EF
FF
00000000 RW
E657 1
0
0
0
0
0
PF
EF
FF
00000000 rrrrrbbb
E658 1
IBNIE
0
0
EP8
EP6
EP4
EP2
EP1
EP0
00000000 RW
E659 1
IBNIRQ
[12]
0
0
EP8
EP6
EP4
EP2
EP1
EP0
00xxxxxx
rrbbbbbb
E65A 1
NAKIE
EP8
EP6
EP4
EP2
EP1
EP0
0
IBN
00000000 RW
E65B 1
NAKIRQ
[12]
EP8
EP6
EP4
EP2
EP1
EP0
0
IBN
xxxxxx0x
bbbbbbrb
E65C 1
E65D 1
E65E 1
USBIE
USBIRQ
[12]
EPIE
0
0
EP8
EP0ACK
EP0ACK
EP6
HSGRANT
HSGRANT
EP4
URES
URES
EP2
SUSP
SUSP
EP1OUT
SUTOK
SUTOK
EP1IN
SOF
SOF
EP0OUT
SUDAV
SUDAV
EP0IN
00000000 RW
0xxxxxxx
00000000 RW
rbbbbbbb
E65F 1
EPIRQ
[12]
EP8
EP6
EP4
EP2
EP1OUT
EP1IN
EP0OUT
EP0IN
0
RW
E660 1
Note:
12. The register can only be reset, it cannot be set.
GPIFIE
[11]
0
0
0
0
0
0
GPIFWF
GPIFDONE
00000000 RW
Table 5-1. FX2LP Register Summary
(continued)
Hex
Size Name
Description
b7
b6
b5
b4
b3
b2
b1
b0
Default
Access
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C68013A-128AXCKJ 制造商:Cypress Semiconductor 功能描述:
CY7C68013A-128AXI 功能描述:8位微控制器 -MCU EZ USB FX2LP LO PWR LO IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CY7C68013A-128AXIKJ 制造商:Cypress Semiconductor 功能描述:
CY7C68013A56BAXC 制造商:Cypress Semiconductor 功能描述:
CY7C68013A-56BAXC 功能描述:8位微控制器 -MCU EZ USB FX2LP LO PWR LO COM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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