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參數(shù)資料
| 型號： | CY7C64714 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | EZ-USB FX1 USB Microcontroller Full-speed USB Peripheral Controller(EZ-USB FX1 USB微控制器，全速USB外設(shè)控制器) |
| 中文描述： | 的EZ - USB FX1的USB微控制器全速USB外設(shè)控制器（的EZ - USB FX1的的USB微控制器，全速的USB外設(shè)控制器） |
| 文件頁數(shù)： | 16/50頁 |
| 文件大?。?/td> | 1419K |
| 代理商： | CY7C64714 |
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CY7C64713/14
Document #: 38-08039 Rev. *C
Page 16 of 50
99
77
42
RESET#
Input
N/A
Active LOW Reset
. Resets the entire chip. See section 4.9 ”Reset and
Wakeup” on page 5 for more details.
External Access
. This pin determines where the 8051 fetches code
between addresses 0x0000 and 0x3FFF. If EA = 0 the 8051 fetches this
code from its internal RAM. IF EA = 1 the 8051 fetches this code from
external memory.
Crystal Input
. Connect this signal to a 24-MHz parallel-resonant, funda-
mental mode crystal and load capacitor to GND.
It is also correct to drive XTALIN with an external 24 MHz square wave
derived from another clock source. When driving from an external source,
the driving signal should be a 3.3V square wave.
Crystal Output
. Connect this signal to a 24-MHz parallel-resonant, funda-
mental mode crystal and load capacitor to GND.
If an external clock is used to drive XTALIN, leave this pin open.
CLKOUT:
12-, 24- or 48-MHz clock, phase locked to the 24-MHz input clock.
The 8051 defaults to 12-MHz operation. The 8051 may three-state this
output by setting CPUCS.1 = 1.
35
EA
Input
N/A
12
11
5
XTALIN
Input
N/A
11
10
4
XTALOUT
Output
N/A
1
100
54
CLKOUT
O/Z
12
MHz
Port A
82
67
33
PA0 or
INT0#
I/O/Z
I
(PA0)
Multiplexed pin whose function is selected by PORTACFG.0
PA0
is a bidirectional IO port pin.
INT0#
is the active-LOW 8051 INT0 interrupt input signal, which is either
edge triggered (IT0 = 1) or level triggered (IT0 = 0).
Multiplexed pin whose function is selected by:
PORTACFG.1
PA1
is a bidirectional IO port pin.
INT1#
is the active-LOW 8051 INT1 interrupt input signal, which is either
edge triggered (IT1 = 1) or level triggered (IT1 = 0).
Multiplexed pin whose function is selected by two bits:
IFCONFIG[1:0].
PA2
is a bidirectional IO port pin.
SLOE
is an input-only output enable with programmable polarity (FIFOPIN-
POLAR.4) for the slave FIFOs connected to FD[7..0] or FD[15..0].
Multiplexed pin whose function is selected by:
WAKEUP.7 and OEA.3
PA3
is a bidirectional I/O port pin.
WU2
is an alternate source for
USB Wakeup,
enabled by WU2EN bit
(WAKEUP.1) and polarity set by WU2POL (WAKEUP.4). If the 8051 is in
suspend and WU2EN = 1, a transition on this pin starts up the oscillator and
interrupts the 8051 to allow it to exit the suspend mode. Asserting this pin
inhibits the chip from suspending, if WU2EN = 1.
Multiplexed pin whose function is selected by:
IFCONFIG[1..0].
PA4
is a bidirectional I/O port pin.
FIFOADR0
is an input-only address select for the slave FIFOs connected
to FD[7..0] or FD[15..0].
Multiplexed pin whose function is selected by:
IFCONFIG[1..0].
PA5
is a bidirectional I/O port pin.
FIFOADR1
is an input-only address select for the slave FIFOs connected
to FD[7..0] or FD[15..0].
Multiplexed pin whose function is selected by the IFCONFIG[1:0] bits.
PA6
is a bidirectional I/O port pin.
PKTEND
is an input used to commit the FIFO packet data to the endpoint
and whose polarity is programmable via FIFOPINPOLAR.5.
83
68
34
PA1 or
INT1#
I/O/Z
I
(PA1)
84
69
35
PA2 or
SLOE
I/O/Z
I
(PA2)
85
70
36
PA3 or
WU2
I/O/Z
I
(PA3)
89
71
37
PA4 or
FIFOADR0
I/O/Z
I
(PA4)
90
72
38
PA5 or
FIFOADR1
I/O/Z
I
(PA5)
91
73
39
PA6 or
PKTEND
I/O/Z
I
(PA6)
Table 5-1. FX1 Pin Definitions
(continued)
[8]
128
TQFP
100
TQFP
56
QFN
Name
Type
Default
Description
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| CY7C64714-100AXC | 功能描述:IC MCU USB EZ FX1 16KB 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器 - 特定應(yīng)用 系列:EZ-USB FX1™ 產(chǎn)品變化通告:Product Discontinuation 26/Aug/2009 標(biāo)準(zhǔn)包裝:250 系列:- 應(yīng)用:網(wǎng)絡(luò)處理器 核心處理器:4Kc 程序存儲器類型:- 控制器系列:- RAM 容量:16K x 8 接口:以太網(wǎng)，UART，USB 輸入/輸出數(shù):- 電源電壓:1.8V, 3.3V 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:208-LQFP 包裝:帶卷 (TR) 供應(yīng)商設(shè)備封裝:PG-LQFP-208 其它名稱:SP000314382 |
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