參數(shù)資料
型號: CY7C63743-SC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
中文描述: 8-BIT, OTPROM, 12 MHz, RISC MICROCONTROLLER, PDSO24
封裝: 0.300 INCH, PLASTIC, MO-119, SOIC-24
文件頁數(shù): 32/58頁
文件大?。?/td> 1236K
代理商: CY7C63743-SC
FOR
FOR
enCoRe
USB CY7C63722/23
CY7C63743
Document #: 38-08022 Rev. **
Page 32 of 58
Bit [7:0]: Timer lower 8 bits
Bit [7:4]:
Reserved
Bit [3:0]: Timer upper 4 bits
19.0
Timer Capture Registers
Four 8-bit capture timer registers provide both rising- and falling-edge event timing capture on two pins. Capture Timer A is
connected to Pin 0.0, and Capture Timer B is connected to Pin 0.1. These can be used to mark the time at which a rising or falling
event occurs at the two GPIO pins. Each timer will capture 8 bits of the free-running timer into its Capture Timer Data Register if
a rising or falling edge event that matches the specified rising or falling edge condition at the pin. A prescaler allows selection of
the capture timer tick size. Interrupts can be individually enabled for the four capture registers. A block diagram is shown in
Figure 19-1
.
Bit #
7
6
5
4
3
2
1
0
Bit Name
Reserved
Timer [11:8]
Read/Write
-
-
-
-
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Figure 18-2. Timer MSB Register (Address 0x25)
Figure 18-3. Timer Block Diagram
10
9
7
8
5
6
4
3
2
1 MHz clock
1.024-ms interrupt
128-
μ
s interrupt
To Timer Registers
8
1
0
11
L1
L0
L2
L3
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
相關PDF資料
PDF描述
CY7C63722 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63723 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63723-PC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743 enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
CY7C63743-PC enCoRe USB Combination Low-Speed USB & PS/2 Peripheral Controller
相關代理商/技術參數(shù)
參數(shù)描述
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