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參數(shù)資料
| 型號： | CY7C43683AV-7AC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 1K/4K/16K x36 Unidirectional Synchronous FIFO with Bus Matching |
| 中文描述： | 16K X 36 OTHER FIFO, 6 ns, PQFP128 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-128 |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 481K |
| 代理商： | CY7C43683AV-7AC |
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3.3V 1K/4K/16K x36 Unidirectional Synchronous
FIFO with Bus Matching
CY7C43663AV
CY7C43643AV
CY7C43683AV
Cypress Semiconductor Corporation
Document #: 38-06024 Rev. *C
3901 North First Street
San Jose
CA 95134
Revised December 26, 2002
408-943-2600
Features
High-speed, low-power, unidirectional, First-In
First-Out (FIFO) memories with bus-matching capabil-
ities
1K × 36 (CY7C43643AV)
4K × 36 (CY7C43663AV)
16K × 36 (CY7C43683AV)
0.25-micron CMOS for optimum speed/power
High-speed 133-MHz operation (7.5-ns Read/Write
cycle times)
Low power
—I
CC
= 60 mA
—I
SB
= 10 mA
Fully asynchronous and simultaneous Read and Write
operation permitted
Mailbox bypass register for each FIFO
Parallel and serial programmable Almost Full and
Almost Empty flags
Retransmit function
Standard or FWFT user selectable mode
Partial reset
Big or Little Endian format for word or byte bus sizes
128-pin TQFP packaging
Easily expandable in width and depth
Logic Block Diagram
Port A
Control
Logic
Port B
Control
Logic
Mail1
Register
I
R
O
R
Write
Pointer
Read
Pointer
Status
Flag Logic
Programmable
Flag Offset
Registers
Timing
Mode
1K/4K/16K
×
36
Dual Ported
Memory
Mail2
Register
FIFO,
Mail1
Mail2
Reset
Logic
CLKA
CSA
W/RA
ENA
MBA
RT
MRS1
MRS2
PRS
FF/IR
AF
SPM
FS0/SD
FS1/SEN
A
0
–
35
MBF2
BE/FWFT
B
0
–
35
CLKB
CSB
W/RB
ENB
MBB
BM
SIZE
EF/OR
AE
MBF1
B
36
36
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| CY7C443 | Clocked 2K x 9 FIFOs(2Kx 9定時(shí)的先進(jìn)先出) |
| CY7C456 | 1K x 18 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標(biāo)記的1Kx18可級聯(lián)定時(shí)的先進(jìn)先出) |
| CY7C455 | 512 x 18 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標(biāo)記的512x18可級聯(lián)定時(shí)的先進(jìn)先出) |
| CY7C457 | 2K x 18 Cascadable Clocked FIFOs with Programmable Flags(帶可編程標(biāo)記的2Kx18可級聯(lián)定時(shí)的先進(jìn)先出) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43684AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 16K x 36 x 2 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V BIDIR SYNC FIFO W/ BUS MATCHING 16KX32X2 - Bulk |
| CY7C43686-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43686AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Triple Depth/Width Tri-Bus 16K x 36/16K x 18 x 2 128-Pin TQFP |
| CY7C439-40DMB | 制造商:Cypress Semiconductor 功能描述: |
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