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參數(shù)資料
| 型號： | CY7C43632 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 512 x36 x2 Bidirectional Synchronous FIFO(512 x36 x2 雙向同步先進先出) |
| 中文描述： | 512 x36 x2雙向同步FIFO（512 x36 x2雙向同步先進先出） |
| 文件頁數(shù)： | 28/31頁 |
| 文件大?。?/td> | 463K |
| 代理商： | CY7C43632 |
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CY7C43622
CY7C43632/CY7C43642
CY7C43662/CY7C43682
28
PRELIMINARY
Table 1. Flag Programming
FS1
H
FS0
H
RST1
↑
X
↑
X
↑
X
↑
RST2
X
↑
X
↑
X
↑
↑
X1 and Y1 Registers
[41]
64
X2 and Y2 Registers
[42]
X
H
H
X
64
H
L
16
X
H
L
X
16
L
H
8
X
L
H
X
8
L
L
Programming via Port A
Programming via Port A
Table 2. Port A Enable Function
CSA
W/RA
ENA
MBA
CLKA
A
0
–
35
Outputs
In high-impedance state
Port Function
H
X
X
X
X
None
L
H
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
H
H
L
In high-impedance state
FIFO1 write
L
H
H
H
In high-impedance state
Mail1 write
L
L
L
L
Active, FIFO2 output register
None
L
L
H
L
Active, FIFO2 output register
FIFO2 read
L
L
L
H
Active, Mail2 register
None
L
L
H
H
Active, Mail2 register
Mail2 read (set MBF2 HIGH)
Table 3. Port B Enable Function
CSB
W/RB
ENB
MBB
CLKB
B
0
–
35
Outputs
In high-impedance state
Port Function
H
X
X
X
X
None
L
L
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
L
H
L
In high-impedance state
FIFO2 write
L
L
H
H
In high-impedance state
Mail2 write
L
H
L
L
Active, FIFO1 output register
None
L
H
H
L
Active, FIFO1 output register
FIFO1 read
L
H
L
H
Active, Mail1 register
None
L
H
H
H
Active, Mail1 register
Mail1 read (set MBF1 HIGH)
Notes:
41. X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
42. X2 register holds the offset for AEA; Y2 register holds the offset for AFB.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C43622 | 256 x36 x2 Bidirectional Synchronous FIFO(256 x36 x2 雙向同步先進先出) |
| CY7C43682 | 16K x36 x2 Bidirectional Synchronous FIFO(16K x36 x2 雙向同步先進先出) |
| CY7C43633 | 512 x36 Unidirectional Synchronous FIFO w/ Bus Matching(512 x36 單向同步先進先出帶總線匹配) |
| CY7C43623 | 256 x36 Unidirectional Synchronous FIFO w/ Bus Matching(256 x36 單向同步先進先出帶總線匹配) |
| CY7C43643 | 1K x36 Unidirectional Synchronous FIFO w/ Bus Matching(1K x36 單向同步先進先出帶總線匹配) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43642-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 1K x 36 x 2 120-Pin TQFP |
| CY7C43643-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43643AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
| CY7C43643AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
| CY7C43643AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
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