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參數(shù)資料
| 型號： | CY7C421 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 512 x 9 Asynchronous FIFO(512 x 9 位異步先進先出（FIFO）) |
| 中文描述： | 512 × 9異步FIFO（512 × 9位異步先進先出（FIFO）的） |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 483K |
| 代理商： | CY7C421 |
CY7C419/21/25/29/33
Document #: 38-06001 Rev. *B
Page 5 of 25
Switching Characteristics
Over the Operating Range
[7, 8]
7C419–10
7C421–10
7C425–10
7C429–10
7C433–10
Min.
20
7C419–15
7C421–15
7C425–15
7C429–15
7C433–15
Min.
25
7C420–20
7C421–20
7C424–20
7C425–20
7C428–20
7C429–20
7C433–20
Min.
30
7C420–25
7C421–25
7C424–25
7C425–25
7C429–25
7C432–25
7C433–25
Min.
35
Parameter
t
RC
t
A
t
RR
t
PR
t
LZR[6,9]
t
DVR[9,10]
t
HZR[6,9,10]
t
WC
t
PW
t
HWZ[6,9]
t
WR
t
SD
t
HD
t
MRSC
t
PMR
t
RMR
t
RPW
t
WPW
t
RTC
t
PRT
t
RTR
Notes:
7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V and output loading of the specified I
OL
/I
OH
and 30 pF load
capacitance, as in part (a) of AC Test Load and Waveforms, unless otherwise specified.
8. See the last page of this specification for Group A subgroup testing information.
9. t
HZR
transition is measured at +200 mV from V
OL
and –200 mV from V
OH
. t
DVR
transition is measured at the 1.5V level. t
HWZ
and t
LZR
transition is measured
at
±
100 mV from the steady state.
10.t
HZR
and t
DVR
use capacitance loading as in part (b) of AC Test Load and Waveforms.
Description
Max.
Max.
Max.
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
Read LOW to Low Z
Data Valid After Read HIGH
Read HIGH to High Z
Write Cycle Time
Write Pulse Width
Write HIGH to Low Z
Write Recovery Time
Data Set-Up Time
Data Hold Time
MR Cycle Time
MR Pulse Width
MR Recovery Time
Read HIGH to MR HIGH
Write HIGH to MR HIGH
Retransmit Cycle Time
Retransmit Pulse Width
Retransmit Recovery Time
10
15
20
25
10
10
3
5
10
15
3
5
10
20
3
5
10
25
3
5
15
15
15
18
20
10
5
10
6
0
20
10
10
10
10
20
10
10
25
15
5
10
8
0
25
15
10
15
15
25
15
10
30
20
5
10
12
0
30
20
10
20
20
30
20
10
35
25
5
10
15
0
35
25
10
25
25
35
25
10
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參數(shù)描述 |
|---|---|
| CY7C4211 WAF | 制造商:Cypress Semiconductor 功能描述: |
| CY7C421-10JC | 制造商:Rochester Electronics LLC 功能描述:512 X 9 28 PIN .300 PARALLEL-CASCADEABLEFIFO " - Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY7C421-10JXC | 功能描述:IC ASYNC FIFO MEM 512X9 32-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| CY7C421-10JXCT | 功能描述:IC ASYNC FIFO MEM 512X9 32-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256（64 x 4） 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433 |
| CY7C421-10PC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 512 x 9 28-Pin PDIP |
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