參數(shù)資料
型號: CY7C421
廠商: Cypress Semiconductor Corp.
英文描述: 512 x 9 Asynchronous FIFO(512 x 9 位異步先進(jìn)先出(FIFO))
中文描述: 512 × 9異步FIFO(512 × 9位異步先進(jìn)先出(FIFO)的)
文件頁數(shù): 1/25頁
文件大?。?/td> 483K
代理商: CY7C421
256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C419/21/25/29/33
Cypress Semiconductor Corporation
Document #: 38-06001 Rev. *B
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised June 30, 2005
Features
Asynchronous first-in first-out (FIFO) buffer memories
256 x 9 (CY7C419)
512 x 9 (CY7C421)
1K x 9 (CY7C425)
2K x 9 (CY7C429)
4K x 9 (CY7C433)
Dual-ported RAM cell
High-speed 50.0-MHz read/write independent of
depth/width
Low operating power: I
CC
= 35 mA
Empty and Full flags (Half Full flag in standalone)
TTL compatible
Retransmit in standalone
Expandable in width
PLCC, 7x7 TQFP, SOJ, 300-mil and 600-mil DIP
Pb-Free Packages Available
Pin compatible and functionally equivalent to IDT7200,
IDT7201, IDT7202, IDT7203, IDT7204, AM7200, AM7201,
AM7202, AM7203, and AM7204
Functional Description
The CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, and
CY7C432/3 are first-in first-out (FIFO) memories offered in
600-mil wide and 300-mil wide packages. They are, respec-
tively, 256, 512, 1,024, 2,048, and 4,096 words by 9-bits wide.
Each FIFO memory is organized such that the data is read in
the same sequential order that it was written. Full and Empty
flags are provided to prevent overrun and underrun. Three
additional pins are also provided to facilitate unlimited
expansion in width, depth, or both. The depth expansion
technique steers the control signals from one device to
another in parallel, thus eliminating the serial addition of
propagation delays, so that throughput is not reduced. Data is
steered in a similar manner.
The read and write operations may be asynchronous; each
can occur at a rate of 50.0 MHz. The write operation occurs
when the write (W) signal is LOW. Read occurs when read (R)
goes LOW. The nine data outputs go to the high-impedance
state when R is HIGH.
A Half Full (HF) output flag is provided that is valid in the
standalone and width expansion configurations. In the depth
expansion configuration, this pin provides the expansion out
(XO) information that is used to tell the next FIFO that it will be
activated.
In the standalone and width expansion configurations, a LOW
on the retransmit (RT) input causes the FIFOs to retransmit
the data. Read enable (R) and write enable (W) must both be
HIGH during retransmit, and then R is used to access the data.
The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425,
CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated
using an advanced 0.65-micron P-well CMOS technology.
Input ESD protection is greater than 2000V and latch-up is
prevented by careful layout and guard rings.
CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO
相關(guān)PDF資料
PDF描述
CY7C429 2K x 9 Asynchronous FIFO(2K x 9位 異步先進(jìn)先出(FIFO))
CY7C433 4K x 9 Asynchronous FIFO(4K x 9 位異步先進(jìn)先出(FIFO))
CY7C43632 512 x36 x2 Bidirectional Synchronous FIFO(512 x36 x2 雙向同步先進(jìn)先出)
CY7C43622 256 x36 x2 Bidirectional Synchronous FIFO(256 x36 x2 雙向同步先進(jìn)先出)
CY7C43682 16K x36 x2 Bidirectional Synchronous FIFO(16K x36 x2 雙向同步先進(jìn)先出)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C4211 WAF 制造商:Cypress Semiconductor 功能描述:
CY7C421-10JC 制造商:Rochester Electronics LLC 功能描述:512 X 9 28 PIN .300 PARALLEL-CASCADEABLEFIFO " - Bulk 制造商:Cypress Semiconductor 功能描述:
CY7C421-10JXC 功能描述:IC ASYNC FIFO MEM 512X9 32-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433
CY7C421-10JXCT 功能描述:IC ASYNC FIFO MEM 512X9 32-PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:CY7C 標(biāo)準(zhǔn)包裝:15 系列:74F 功能:異步 存儲容量:256(64 x 4) 數(shù)據(jù)速率:- 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:24-DIP(0.300",7.62mm) 供應(yīng)商設(shè)備封裝:24-PDIP 包裝:管件 其它名稱:74F433
CY7C421-10PC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Async Dual Depth/Width Uni-Dir 512 x 9 28-Pin PDIP