參數(shù)資料
型號(hào): CY7C172A
廠商: Cypress Semiconductor Corp.
英文描述: 4K x 4 Static RAM with Separate I/O(帶獨(dú)立的輸入/輸出口的4K x 4靜態(tài) RAM)
中文描述: 4K的× 4靜態(tài)存儲(chǔ)器具有獨(dú)立的I / O(帶獨(dú)立的輸入/輸出口的4K的靜態(tài)內(nèi)存× 4)
文件頁數(shù): 6/9頁
文件大?。?/td> 165K
代理商: CY7C172A
CY7C171A
CY7C172A
6
Read Cycle No. 2
[9,11]
Write Cycle No. 1 (WE Controlled)
[8]
Write Cycle No. 2 (CE Controlled)
[8,12]
Notes:
11. Address valid prior to or coincident with CE transition LOW.
12. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state (7C172A).
Switching Waveforms
(continued)
50%
50%
DATA VALID
t
ACE
t
ACE
t
LZ
t
PU
HIGH IMPEDANCE
IMPEDANCE
ICC
ISB
t
HZ
t
PD
HIGH
t
RCH
C171A–6
t
RCS
DATA OUT
CE
V
CC
SUPPLY
CURRENT
WE
t
AW
t
WC
DATA UNDEFINED
HIGH IMPEDANCE
t
SCE
t
SA
t
PWE
t
HA
t
HD
t
HZWE
t
LZWE
t
SD
CE
WE
DATA IN
ADDRESS
DATA UNDEFINED
t
ADV
DATA VALID
C171A–7
DATAOUT
(7C172A)
DATAOUT
(7C171A)
DATA
IN
VALID
t
WC
DATA UNDEFINED
HIGH IMPEDANCE
t
SCE
t
SA
t
PWE
t
HA
t
HD
t
HZWE
t
SD
ADDRESS
CE
WE
DATA VALID
t
AWE
DATA UNDEFINED
C171A–8
t
AW
DATAOUT
(7C172A)
DATAOUT
(7C171A)
DATA IN
DATA
IN
VALID
相關(guān)PDF資料
PDF描述
CY7C185A 8K x 8 Static RAM(8Kx8靜態(tài) RAM)
CY7C1916BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM)
CY7C1320BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM)
CY7C1316BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM)
CY7C1318BV18 18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst結(jié)構(gòu),18-Mbit DDR-II SRAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C172A-15VC 制造商:Cypress Semiconductor 功能描述:
CY7C172A-15VCT 制造商:Cypress Semiconductor 功能描述:
CY7C172A45DMB 制造商:CYPRESS 功能描述:New
CY7C172A-45DMB 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C172A-45VC 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: