參數(shù)資料
型號(hào): CY7C1475V25-100BGI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture
中文描述: 1M X 72 ZBT SRAM, 8.5 ns, PBGA209
封裝: 14 X 22 MM, 1.76 MM HEIGHT, FBGA-209
文件頁(yè)數(shù): 22/32頁(yè)
文件大小: 928K
代理商: CY7C1475V25-100BGI
CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *I
Page 22 of 32
Capacitance
Tested initially and after any design or process change that may affect these parameters.
Parameter
Description
Test Conditions
100 TQFP
Max.
165 FBGA
Max.
209 FBGA
Max.
Unit
C
ADDRESS
C
DATA
C
CTRL
C
CLK
C
IO
Address Input Capacitance
T
A
= 25
°
C, f = 1 MHz,
V
DD
= 2.5V
V
DDQ
= 2.5V
6
6
6
pF
Data Input Capacitance
5
5
5
pF
Control Input Capacitance
8
8
8
pF
Clock Input Capacitance
6
6
6
pF
Input-Output Capacitance
5
5
5
pF
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Parameter
Description
Test Conditions
100 TQFP
Package
165 FBGA
Package
209 FBGA
Package
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow
standard test methods
and procedures for
measuring thermal
impedance, according to
EIA/JESD51.
24.63
16.3
15.2
°
C/W
Θ
JC
Thermal Resistance
(Junction to Case)
2.28
2.1
1.7
°
C/W
AC Test Loads and Waveforms
OUTPUT
R = 1667
R = 1538
5 pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
R
L
= 50
Z
0
= 50
V
L
= 1.25V
2.5V
ALL INPUT PULSES
V
DDQ
GND
90%
10%
90%
10%
1 ns
1 ns
(c)
2.5V IO Test Load
OUTPUT
R = 14 K
R = 14 K
5 pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
R
L
= 50
Z
0
= 50
V
L
= 0.9V
1.8V
ALL INPUT PULSES
V
DDQ
– 0.2
0.2
90%
10%
90%
10%
1 ns
1 ns
(c)
1.8V IO Test Load
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