參數(shù)資料
型號(hào)： CY7C1474V33-250BGXI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL⑩ Architecture
中文描述： 1M X 72 ZBT SRAM, 3 ns, PBGA209
封裝： 14 X 22 MM, 1.76 MM HEIGHT, LEAD FREE, FBGA-209
文件頁(yè)數(shù)： 28/29頁(yè)
文件大?。?/td> 471K
代理商： CY7C1474V33-250BGXI
CY7C1470V33
CY7C1472V33
CY7C1474V33
Document #: 38-05289 Rev. *I
Page 28 of 29
Document History Page
Document Title: CY7C1470V33/CY7C1472V33/CY7C1474V33 72-Mbit (2M x 36/4M x 18/1M x 72)
Pipelined SRAM with NoBL Architecture
Document Number: 38-05289
Orig. of
Change
**
114676
08/06/02
PKS
New Data Sheet
*A
121520
01/27/03
CJM
Updated features for package offering
Removed 300-MHz offering
Changed tCO, tEOV, tCHZ, tEOHZ from 2.4 ns to 2.6 ns (250 MHz),
tDOH, tCLZ from 0.8 ns to 1.0 ns (250 MHz), tDOH, tCLZ from 1.0 ns
to 1.3 ns (200 MHz)
Updated ordering information
Changed Advanced Information to Preliminary
*B
223721
See ECN
NJY
Changed timing diagrams
Changed logic block diagrams
Modified Functional Description
Modified “Functional Overview” section
Added boundary scan order for all packages
Included thermal numbers and capacitance values for all packages
Included IDD and ISB values
Removed 250-MHz offering and included 225-MHz speed bin
Changed package outline for 165FBGA package and 209-ball BGA package
Removed 119-BGA package offering
*C
235012
See ECN
RYQ
Minor Change: The data sheets do not match on the spec system and
external web
*D
243572
See ECN
NJY
Changed ball C11,D11,E11,F11,G11 from DQPb,DQb,DQb,DQb,DQb to
DQPa,DQa,DQa,DQa,DQa in page 4
Modified capacitance values in page 20
*E
299511
See ECN
SYT
Removed 225-MHz offering and included 250-MHz speed bin
Changed t
CYC
from 4.4 ns to 4.0 ns for 250-MHz Speed Bin
Changed
Θ
JA
from 16.8 to 24.63
°
C/W and
Θ
JC
from 3.3 to 2.28
°
C/W for
100 TQFP Package on Page # 20
Added lead-free information for 100-Pin TQFP and 165 FBGA Packages
Added comment of ‘Lead-free BG packages availability’ below the Ordering
Information
Add Industrial part numbers in Ordering Info section
*F
323039
See ECN
PCI
Unshaded 250 MHz speed bin in the AC/DC Table and Selection Guide
Address expansion pins/balls in the pinouts for all packages are modified as
per JEDEC standard
Added Address Expansion pins in the Pin Definitions Table
Modified V
OL
, V
OH
Test Conditions
Changed package name from 209-ball PBGA to 209-ball FBGA on page# 5
Removed comment of ‘Lead-free BG packages availability below the
Ordering Information
Updated Ordering Information Table
Changed from Preliminary to Final
*G
351937
See ECN
PCI
Updated Ordering Information Table
REV.
ECN No.
Issue Date
Description of Change
VBL
[+] Feedback
相關(guān)PDF資料
PDF描述
CY7C1475V25-100BGI 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture
CY7C1475V25-100BGXI 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture
CY7C1475V25-133BGI 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture
CY7C1475V25-133BGXI 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture
CY7C1475V25 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1475BV25-133BGXI 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 72MB (1Mx72) 2.5v 133MHz FLO-THRU 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1475V33-100AXC 制造商:Cypress Semiconductor 功能描述:72MB (1MBX72) NOBL FLOW-THRU, 3.3V CORE, 2.5/3.3V I/O - Bulk
CY7C1475V33-100BGC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 72MBIT 1MX72 8.5NS 209FBGA - Bulk
CY7C1475V33-133BGC 制造商:Cypress Semiconductor 功能描述:SRAM SYNC OCTAL 3.3V 72MBIT 1MX72 6.5NS 209FBGA - Bulk
CY7C14802BC 制造商:Cypress Semiconductor 功能描述:
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