- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379077 > CY7C1471V33-100BZC (CYPRESS SEMICONDUCTOR CORP) 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture PDF資料下載
參數(shù)資料
| 型號： | CY7C1471V33-100BZC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture |
| 中文描述： | 2M X 36 ZBT SRAM, 8.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1.40 MM HEIGHT, FBGA-165 |
| 文件頁數(shù)： | 22/29頁 |
| 文件大?。?/td> | 375K |
| 代理商： | CY7C1471V33-100BZC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
PRELIMINARY
CY7C1471V33
CY7C1473V33
CY7C1475V33
Document #: 38-05288 Rev. *E
Page 22 of 29
Switching Characteristics
Over the Operating Range
[21, 22]
Parameter
t
POWER‘
Clock
t
CYC
t
CH
t
CL
Output Times
t
CDV
t
DOH
t
CLZ
t
CHZ
t
OEV
t
OELZ
t
OEHZ
Set-up Times
t
AS
t
ALS
t
WES
t
CENS
t
DS
t
CES
Hold Times
t
AH
t
ALH
t
WEH
t
CENH
t
DH
t
CEH
Notes:
17.This part has a voltage regulator internally; t
POWER
is the time that the power needs to be supplied above V
DD
(minimum) initially, before a Read or Write operation
can be initiated.
18.t
, t
,t
, and t
are specified with AC test conditions shown in part (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage.
19.At any given voltage and temperature, t
is less than t
and t
is less than t
to eliminate bus contention between SRAMs when sharing the same
data bus. These specifications do not imply a bus contention condition, but reflect parameters guaranteed over worst case user conditions. Device is designed
to achieve High-Z prior to Low-Z under the same system conditions
20.This parameter is sampled and not 100% tested.
21.Timing reference level is 1.5V when V
= 3.3V and is 1.25V when V
DDQ
= 2.5V.
22.Test conditions shown in (a) of AC Test Loads unless otherwise noted.
Description
133 MHz
Min.
1
100 MHz
Min.
1
Unit
ms
Max.
Max.
Clock Cycle Time
Clock HIGH
Clock LOW
7.5
2.5
2.5
10
3.0
3.0
ns
ns
ns
Data Output Valid After CLK Rise
Data Output Hold After CLK Rise
Clock to Low-Z
[18, 19, 20]
Clock to High-Z
[18, 19, 20]
OE LOW to Output Valid
OE LOW to Output Low-Z
[18, 19, 20]
OE HIGH to Output High-Z
[18, 19, 20]
6.5
8.5
ns
ns
ns
ns
ns
ns
ns
2.5
3.0
2.5
3.0
3.8
3.0
4.5
3.8
0
0
3.0
4.0
Address Set-up Before CLK Rise
ADV/LD Set-up Before CLK Rise
WE, BW
X
Set-up Before CLK Rise
CEN Set-up Before CLK Rise
Data Input Set-up Before CLK Rise
Chip Enable Set-Up Before CLK Rise
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
ns
ns
ns
ns
ns
ns
Address Hold After CLK Rise
ADV/LD Hold After CLK Rise
WE, BW
X
Hold After CLK Rise
CEN Hold After CLK Rise
Data Input Hold After CLK Rise
Chip Enable Hold After CLK Rise
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1471V33-100BZXC | LME Series; Mounting Style: Direct mount; Functions: Continuous light; Light Type: LED; Rated Voltage: 24V AC/DC; Style: 2 - light; Color: Red, Green (other color combo avail); Diameter: 60; Applicable Model: LME |
| CY7C1471V33-133BZXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture |
| CY7C1471V33-100AXC | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture |
| CY7C1474V33-250BGI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL⑩ Architecture |
| CY7C1474V33-250BGXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL⑩ Architecture |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1471V33-117AXC | 功能描述:靜態(tài)隨機存取存儲器 2Mx36 3.3V NoBL FT 靜態(tài)隨機存取存儲器 COM RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1471V33-117AXCES | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 72MBIT 2MX36 8.5NS 100TQFP - Bulk |
| CY7C1471V33-133AC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 72MBIT 2MX36 6.5NS 100TQFP - Bulk |
| CY7C1471V33-133ACES | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1471V33-133AXC | 功能描述:靜態(tài)隨機存取存儲器 72MB (2Mx36) 3.3v 133MHz 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。