參數(shù)資料
型號: CY7C1411AV18-278BZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture
中文描述: 4M X 8 QDR SRAM, 0.45 ns, PBGA165
封裝: 15 X 17 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁數(shù): 28/28頁
文件大?。?/td> 1143K
代理商: CY7C1411AV18-278BZC
CY7C1411AV18
CY7C1426AV18
CY7C1413AV18
CY7C1415AV18
Document Number: 38-05614 Rev. *C
Page 28 of 28
Document History Page
Document Title: CY7C1411AV18/CY7C1426AV18/CY7C1413AV18/CY7C1415AV18 36-Mbit QDR-II SRAM 4-Word
Burst Architecture
Document Number: 38-05614
ISSUE
DATE
CHANGE DESCRIPTION OF CHANGE
**
247331
See ECN
SYT
New Data Sheet
*A
326519
See ECN
SYT
Removed CY7C1426AV18 from the title
Included 300 MHz Speed grade
Replaced TBDs with their respective values for I
DD
and I
SB1
Added Industrial temperature grade
Replaced the TBDs on the Thermal Characteristics Table to
Θ
JA
= 17.2
°
C/W
and
Θ
JC
= 3.2
°
C/W
Changed typo of bit # 47 to bit # 108 under the EXTEST OUTPUT BUS
TRI-STATE on Page 16
Replaced TBDs in the Capacitance Table to their respective values for the
165 FBGA Package
Added lead-free Product Information
Updated the Ordering Information by Shading and Unshading MPNs as per
availability
*B
413953
See ECN
NXR
Converted from preliminary to final.
Added CY7C1426AV18 part number to title.
Added 278-MHz speed Bin.
Changed C, C Description in Feature Section and Pin Description
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Added Power-up sequence and Wave form on page# 19
Addeed Footnotes # 15, 16, 17 0n page# 19.
Changed the description of I
X
from Input Load Current to Input Leakage
Current on page# 20.
Modified the I
DD
and I
SB
values.
Modified test condition in Footnote # 22 on page# 20 from V
DDQ
< V
DD
to
V
< V
Replaced Package Name column with Package Diagram in the Ordering
Information table.
Updated Ordering Information Table.
*C
468029
See ECN
NXR
Modified the ZQ Definition from Alternately, this pin can be connected directly
to V
DD
to Alternately, this pin can be connected directly to V
DDQ.
Included Maximum Ratings for Supply Voltage on V
DDQ
Relative to GND
Changed the Maximum Ratings for DC Input Voltage from V
DDQ
to V
DD.
Changed t
TCYC
from 100 ns to 50 ns, changed t
TH
and t
TL
from 40 ns to 20 ns,
changed t
TMSS
, t
TDIS
, t
CS
, t
TMSH
, t
TDIH
, t
CH
from
10 ns to 5 ns and changed
t
TDOV
from 20 ns to 10 ns in TAP AC Switching Characteristics table
Modified Power-Up waveform
Changed the Maximum rating of Ambient Temperature with Power Applied
from –10°C to +85°C to –55°C to +125°C
Added additional notes in the AC parameter section
Modified AC Switching Waveform.
Updated the Typo in the AC Switching Characteristics Table.
Updated the Ordering Information Table.
REV.
ECN NO.
ORIG. OF
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相關PDF資料
PDF描述
CY7C1411AV18-278BZI 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture
CY7C1411AV18-278BZXC 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture
CY7C1411AV18-278BZXI 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture
CY7C1411AV18-300BZC 36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture
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