| 型號(hào): | CY7C1372C |
| 廠商: | Cypress Semiconductor Corp. |
| 英文描述: | 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
| 中文描述: | 為512k × 36/1M × 18流水線的SRAM架構(gòu)的總線延遲 |
| 文件頁(yè)數(shù): | 2/27頁(yè) |
| 文件大?。?/td> | 704K |
| 代理商: | CY7C1372C |

相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1372C-167AC | 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
| CY7C1372C-167AI | 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
| CY7C1372C-250BZI | 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture |
| CY7C1370D-225BGC | 18-Mbit (512K X 36/1M X 18) Pipelined SRAM with NoBL Architecture |
| CY7C1370D-250AXI | 18-Mbit (512K X 36/1M X 18) Pipelined SRAM with NoBL Architecture |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1372C-133BZC | 制造商:Cypress Semiconductor 功能描述:16MB (1MX18) 3.3V NOBL-PIPE SRAM - Bulk |
| CY7C1372C167AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1372C-167AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 18M-Bit 1M x 18 3.4ns 100-Pin TQFP |
| CY7C1372C-167AI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 18M-Bit 1M x 18 3.4ns 100-Pin TQFP |
| CY7C1372C-167AIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Dual 3.3V 18M-Bit 1M x 18 3.4ns 100-Pin TQFP T/R |