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參數(shù)資料
| 型號(hào)： | CY7C1354C-200BGXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
| 中文描述： | 256K X 36 ZBT SRAM, 3.2 ns, PBGA119 |
| 封裝： | (14 X 22 X 2.4) MM, LEAD FREE, PLASTIC, BGA-119 |
| 文件頁(yè)數(shù)： | 16/28頁(yè) |
| 文件大?。?/td> | 467K |
| 代理商： | CY7C1354C-200BGXI |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)當(dāng)前第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)
CY7C1354C
CY7C1356C
Document #: 38-05538 Rev. *G
Page 16 of 28
Boundary Scan Exit Order (512K × 18)
Bit #
1
2
3
4
5
6
7
8
9
10
119-ball ID
K4
H4
M4
F4
B4
G4
C3
B3
T2
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
D6
E7
F6
G7
H6
T7
K7
L6
N6
P7
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
T6
A3
C5
B5
A5
C6
A6
P4
N4
R6
T5
165-ball ID
B6
B7
A7
B8
A8
A9
B10
A10
A11
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
C11
D11
E11
F11
G11
H11
J10
K10
L10
M10
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
R11
R10
P10
R9
P9
R8
P8
R6
P6
R4
P4
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
T3
R2
R3
R3
P3
R1
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
P2
N1
M2
L1
K2
Not Bonded
(Preset to 1)
H1
G2
E2
D1
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
C2
A2
E4
B2
Not Bonded
(Preset to 0
G3
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
N1
M1
L1
K1
J1
Not Bonded
(Preset to 1)
G2
F2
E2
D2
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
B2
A2
A3
B3
Not Bonded
(Preset to 0)
Not Bonded
(Preset to 0)
A4
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
Not Bonded
(Preset to 0
L5
B6
68
69
B5
A6
Boundary Scan Exit Order (512K × 18)
(continued)
Bit #
119-ball ID
165-ball ID
[+] Feedback
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1354C-200BZC | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
| CY7C1356C-166BZXI | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
| CY7C1356C-200AXC | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
| CY7C1356C-200AXI | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
| CY7C1356C-200BGC | 9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL⑩ Architecture |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1354C-225AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 3.3V NoBL Sync PL COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1354C-250AXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1354C-250AXCKJ | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1354CV25-166AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 2.5V NoBL Sync PL 靜態(tài)隨機(jī)存取存儲(chǔ)器 COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1354CV25-166AXCT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 256Kx36 2.5V NoBL Sync PL 靜態(tài)隨機(jī)存取存儲(chǔ)器 COM RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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