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參數(shù)資料
| 型號： | CY7C1339B-133BGIT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 32 CACHE SRAM, 4 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 2.40 MM HEIGHT, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 527K |
| 代理商： | CY7C1339B-133BGIT |
CY7C1339B
Document #: 38-05141 Rev. *A
Page 11 of 17
Switching Waveforms
Write Cycle Timing[14, 15]
Notes:
14. WE is the combination of BWE, BW[3:0], and GW to define a Write cycle (see Write Cycle Descriptions table).
15. WDx stands for Write Data to Address X.
ADSP
CLK
ADSC
ADV
ADD
CE1
OE
GW
WE
CE2
CE3
1a
Data In
tCYC
tCH
tCL
tADS
tADH
tADS
tADH
tADVS
tADVH
WD1
WD2
WD3
tAH
tAS
tWS
tWH
tWS
tCES
tCEH
tCES
tCEH
tCES
tCEH
2b
3a
1a
Single Write
Burst Write
Unselected
ADSP ignored with CE1 inactive
CE1 masks ADSP
= DON’T CARE
= UNDEFINED
Pipelined Write
2a
2c
2d
tDH
tDS
High-Z
Unselected with CE2
ADV Must Be Inactive for ADSP Write
ADSC initiated Write
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PDF描述 |
|---|---|
| CY7C1339G-200AXCT | 128K X 32 CACHE SRAM, 2.8 ns, PQFP100 |
| CY7C1347D-250BGC | 128K X 36 CACHE SRAM, 2.4 ns, PBGA119 |
| CY7C1512JV18-267BZXC | 4M X 18 QDR SRAM, 0.45 ns, PBGA165 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1339F-100AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4M-Bit 128K x 32 4.5ns 100-Pin TQFP |
| CY7C1339F-100BGI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1339F-100BGIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4M-Bit 128K x 32 4.5ns 119-Pin BGA T/R |
| CY7C1339F-133AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4M-Bit 128K x 32 4ns 100-Pin TQFP |
| CY7C1339F-166AC | 制造商:Rochester Electronics LLC 功能描述:128KX32 3.3V SYNC-PL SRAM (2.5/3.3V I/O) 1CD - Bulk |
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