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參數(shù)資料
| 型號(hào)： | CY7C1145V18 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
| 中文描述： | 18兆位的國(guó)防評(píng)估報(bào)告⑩- II SRAM的4字突發(fā)架構(gòu)（2.0周期讀寫(xiě)延遲） |
| 文件頁(yè)數(shù)： | 11/28頁(yè) |
| 文件大小： | 954K |
| 代理商： | CY7C1145V18 |
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CY7C1141V18
CY7C1156V18
CY7C1143V18
CY7C1145V18
Document Number: 001-06583 Rev. *C
Page 11 of 28
Write Cycle Descriptions
The write cycle descriptions of CY7C1141V18 and CY7C1143V18 follows.
[2, 10]
BWS
0
/
NWS
0
BWS
1
/
NWS
1
K
K
Comments
L
L
L–H
–
During the data portion of a write sequence
:
CY7C1141V18
both nibbles (D
[7:0]
) are written into the device,
CY7C1143V18
both bytes (D
[17:0]
) are written into the device.
L-H During the data portion of a write sequence
:
CY7C1141V18
both nibbles (D
[7:0]
) are written into the device,
CY7C1143V18
both bytes (D
[17:0]
) are written into the device.
During the data portion of a write sequence
:
CY7C1141V18
only the lower nibble (D
[3:0]
) is written into the device, D
[7:4]
remains unaltered.
CY7C1143V18
only the lower byte (D
[8:0]
) is written into the device, D
[17:9]
remains unaltered.
L–H During the data portion of a write sequence
:
CY7C1141V18
only the lower nibble (D
[3:0]
) is written into the device, D
[7:4]
remains unaltered.
CY7C1143V18
only the lower byte (D
[8:0]
) is written into the device, D
[17:9]
remains unaltered.
During the data portion of a write sequence
:
CY7C1141V18
only the upper nibble (D
[7:4]
) is written into the device, D
[3:0]
remains unaltered.
CY7C1143V18
only the upper byte (D
[17:9]
) is written into the device, D
[8:0]
remains unaltered.
L–H During the data portion of a write sequence
:
CY7C1141V18
only the upper nibble (D
[7:4]
) is written into the device, D
[3:0]
remains unaltered.
CY7C1143V18
only the upper byte (D
[17:9]
) is written into the device, D
[8:0]
remains unaltered.
L
L
–
L
H
L–H
–
L
H
–
H
L
L–H
–
H
L
–
H
H
L–H
–
No data is written into the devices during this portion of a write operation.
H
H
–
L–H No data is written into the devices during this portion of a write operation.
The write cycle descriptions of CY7C1156V18 follows.
[2, 10]
BWS
0
K
K
L
L–H
–
During the data portion of a write sequence, the single byte (D
[8:0]
) is written into the device.
L
–
L–H
During the data portion of a write sequence, the single byte (D
[8:0]
) is written into the device.
H
L–H
–
No data is written into the device during this portion of a write operation.
H
–
L–H
No data is written into the device during this portion of a write operation.
Note
10.Is based on a Write cycle was initiated in accordance with the Write Cycle Description Truth Table. Alter NWS
0
, NWS
1
,
BWS
0
, BWS
1
, BWS
2
,
and BWS
3
on different
portions of a Write cycle, as long as the setup and hold requirements are achieved.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1145V18-300BZC | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
| CY7C1145V18-300BZI | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
| CY7C1145V18-300BZXC | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
| CY7C1145V18-300BZXI | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
| CY7C1156V18 | 18-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1146KV18-400BZC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C11481KV18-400BZC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 1Mb x 18 400 MHz Sync 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C11481KV18-400BZXC | 功能描述:IC SRAM 18MBIT 400MHZ 165FPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類(lèi)型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| CY7C1148KV18-400BZC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (1Mx18) 1.8v 440MHz DDR II 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1148KV18-400BZXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18MB (1Mx18) 1.8v 400MHz DDR II 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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