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參數(shù)資料
| 型號(hào)： | CY7C1007 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1M x 1 Static RAM(1M x 1 靜態(tài) RAM) |
| 中文描述： | 100萬(wàn)× 1靜態(tài)存儲(chǔ)器（1米× 1靜態(tài)內(nèi)存） |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大小： | 141K |
| 代理商： | CY7C1007 |
1M x 1 Static RAM
CY7C107
CY7C1007
Cypress Semiconductor Corporation
3901 North First Street
San Jose
December 1992 – Revised September 3, 1999
CA 95134
408-943-2600
Features
High speed
—t
AA
= 12 ns
CMOS for optimum speed/power
Low active power
—825 mW
Low standby power
—275 mW
2.0V data retention (optional)
—
100
μ
W
Automatic power-down when deselected
TTL-compatible inputs and outputs
Functional Description
The CY7C107 and CY7C1007 are high-performance CMOS
static RAMs organized as 1,048,576 words by 1 bit. Easy
memory expansion is provided by an active LOW Chip Enable
(CE) and three-state drivers. These devices have an automatic
power-down feature that reduces power consumption by more
than 65% when deselected.
Writing to the devices is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the input pin
(D
IN
) is written into the memory location specified on the ad-
dress pins (A
0
through A
19
).
Reading from the devices is accomplished by taking Chip En-
able (CE) LOW while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the data output (D
OUT
)
pin.
The output pin (D
OUT
) is placed in a high-impedance state
when the device is deselected (CE HIGH) or during a write
operation (CE and WE LOW).
The CY7C107 is available in a standard 400-mil-wide SOJ; the
CY7C1007 is available in a standard 300-mil-wide SOJ.
LogicBlock Diagram
Pin Configuration
SOJ
Top View
512x2048
ARRAY
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
POWER
DOWN
WE
CE
INPUT BUFFER
D
OUT
D
IN
A
4
A
3
A
2
A
1
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
20
19
18
17
21
24
23
22
25
28
27
26
GND
A
11
A
12
A
13
A
14
A
WE
V
CC
A
9
A
8
A
7
A
6
A
5
A
10
CE
A
0
D
IN
D
OUT
A
2
A
1
A
4
NC
A
3
NC
A
16
A
17
A
18
A
19
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
1
A
9
107-1
107-2
Selection Guide
7C107-12
7C1007-12
12
150
7C107-15
7C1007-15
15
135
7C107-20
7C1007-20
20
125
7C107-25
7C1007-25
25
120
7C107-35
35
110
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum Standby
Current (mA)
50
40
30
30
25
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1007B-12VC | 制造商:Rochester Electronics LLC 功能描述:1MB (1M X 1)- FAST ASYNCH SRAM - Bulk |
| CY7C1007B-15VC | 制造商:Rochester Electronics LLC 功能描述:1MB (1M X 1)- FAST ASYNCH SRAM - Bulk |
| CY7C1007B-15VXC | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY7C1007B-15VXI | 功能描述:IC SRAM 1MBIT 15NS 28SOJ RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2 |
| CY7C1007B-15VXIT | 功能描述:IC SRAM 1MBIT 15NS 28SOJ RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2 |
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