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| 型號(hào)： | CY62177DV30L-55BAI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 16-Mbit (2M x 8) Static RAM |
| 中文描述： | 2M X 16 STANDARD SRAM, 55 ns, PBGA48 |
| 封裝： | 8 X 9.50 MM, 1.20 MM HEIGHT, FBGA-48 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 856K |
| 代理商： | CY62177DV30L-55BAI |
Document #: 001-07721 Rev. *B
Page 3 of 10
CY62168EV30 MoBL
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of
the device. These user guidelines are not tested.
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground
Potential....................................... –0.3V to V
CC
(max)
+ 0.3V
DC Voltage Applied to Outputs
in High-Z State
[4, 5]
....................... –0.3V to V
CC
(max) + 0.3V
DC Electrical Characteristics
Over the Operating Range
DC Input Voltage
[4, 5]
....................–0.3V to V
CC
(max) + 0.3V
Output Current into Outputs (LOW).............................20 mA
Static Discharge Voltage...........................................> 2001V
(MIL-STD-883, Method 3015)
Latch up Current.....................................................> 200 mA
Operating Range
Range
Ambient
Temperature (T
A
)
[6]
–40°C to +85°C
V
CC
[7]
Industrial
2.2V – 3.6V
Parameter
Description
Test Conditions
CY62168EV30-45
Typ
[3]
Unit
Min
Max
V
OH
Output HIGH Voltage
2.2 < V
CC
< 2.7
2.7 < V
CC
< 3.6
2.2 < V
CC
< 2.7
2.7 < V
CC
< 3.6
2.2 < V
CC
< 2.7
2.7 < V
CC
< 3.6
2.2 < V
CC
< 2.7
2.7 < V
CC
< 3.6
GND < V
I
< V
CC
GND < V
O
< V
CC
, Output disabled
f = f
MAX
= 1/t
RC
f = 1 MHz
I
OH
=
0.1 mA
I
OH
=
1.0 mA
I
OL
= 0.1 mA
I
OH
= 2.1 mA
2.0
V
2.4
V
OL
Output LOW Voltage
0.4
V
0.4
V
IH
Input HIGH Voltage
1.8
V
CC
+ 0.3
V
CC
+ 0.3
0.6
V
2.2
V
IL
Input LOW Voltage
–0.3
V
–0.3
0.8
I
IX
I
OZ
I
CC
Input Leakage Current
–1
+1
μ
A
μ
A
Output Leakage Current
–1
+1
V
CC
Operating Supply
Current
V
CC
= 3.6V,
I
OUT
= 0 mA,
CMOS level
25
30
mA
2.2
4.0
I
SB1
Automatic CE Power Down
Current — CMOS Inputs
CE
1
> V
CC
0.2V, CE
2
< 0.2V,
V
IN
> V
CC
0.2V, V
IN
< 0.2V,
f = f
MAX
(Address and Data Only),
f = 0 (OE, WE)
CE
1
> V
CC
0.2V, CE
2
< 0.2V,
V
IN
> V
CC
0.2V or V
IN
< 0.2V, f = 0,
V
CC
= 3.6V
1.5
12
μ
A
I
SB2[8]
Automatic CE Power Down
Current— CMOS Inputs
1.5
12
μ
A
Capacitance
[9]
Parameter
Description
Test Conditions
Max
Unit
C
IN
C
OUT
Input Capacitance
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC
(typ)
8
pF
Output Capacitance
10
pF
Notes
4. V
IL
(min) = –0.2V for pulse durations less than 20 ns.
5. V
IH
(max)
= V
+ 0.75V for pulse durations less than 20 ns.
6. T
is the “Instant-On” case temperature.
7. Full device AC operation assumes a 100
μ
s ramp time from 0 to V
(min) and 100
μ
s wait time after V
stabilization.
8. Only chip enables (CE
and CE
) must be at CMOS level to meet the I
/ I
spec. Other inputs can be left floating.
9. Tested initially and after any design or process changes that may affect these parameters.
[+] Feedback
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