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參數(shù)資料
| 型號(hào)： | CY62256L-70SNXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 256K (32K x 8) Static RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDSO28 |
| 封裝： | 0.300 INCH, LEAD FREE, SOIC-28 |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大小： | 466K |
| 代理商： | CY62256L-70SNXI |
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256K (32K x 8) Static RAM
CY62256
Cypress Semiconductor Corporation
Document #: 38-05248 Rev. *F
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised August 3, 2006
Features
High speed
— 55 ns
Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
Voltage range
— 4.5V – 5.5V
Low active power and standby power
Easy memory expansion with CE and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Available in a Pb-free and non Pb-free standard 28-pin
narrow SOIC, 28-pin TSOP-1, 28-pin Reverse TSOP-1
and 28-pin DIP packages
Functional Description
[1]
The CY62256 is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE) and active LOW
output enable (OE) and Tri-state drivers. This device has an
automatic
power-down
feature,
consumption by 99.9% when deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O
0
through I/O
7
) is written into the memory location
addressed by the address present on the address pins (A
0
through A
14
). Reading the device is accomplished by selecting
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
reducing
the
power
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
COLUMN
DECODER
R
S
INPUTBUFFER
POWER
DOWN
WE
OE
I/O
0
CE
I/O
1
I/O
2
I/O
3
I/O
7
I/O
6
I/O
5
I/O
4
A
10
A
1
A
1
A
1
A
0
A
1
A
1
Logic Block Diagram
32K × 8
ARRAY
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62256VN | 256K (32K x 8) Static RAM |
| CY62256VNLL-70SNC | 256K (32K x 8) Static RAM |
| CY62256VNLL-70SNXC | 256K (32K x 8) Static RAM |
| CY62256VNLL-70SNXE | 256K (32K x 8) Static RAM |
| CY62256VNLL-70SNXI | 256K (32K x 8) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62256L-70SNXIT | 功能描述:IC SRAM 256KBIT 70NS 28SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:MoBL® 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2 |
| CY62256L-70ZC | 制造商:Cypress Semiconductor 功能描述:Static RAM, 32Kx8, 28 Pin, Plastic, TSSOP |
| CY62256L-70ZCT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Cypress Semiconductor 功能描述: |
| CY62256LL-55SNI | 制造商:Rochester Electronics LLC 功能描述:256K (32K X 8)- SLOW ASYNCH SRAM - Bulk |
| CY62256LL-55SNIT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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