參數(shù)資料
型號(hào): CY62167DV30
廠商: Cypress Semiconductor Corp.
英文描述: 16-Mbit (1M x 16) Static RAM(16-Mb(1M x 16)靜態(tài)RAM)
中文描述: 16兆位(1米× 16),靜態(tài)存儲(chǔ)器(16字節(jié)(1米× 16),靜態(tài)內(nèi)存)
文件頁(yè)數(shù): 4/12頁(yè)
文件大?。?/td> 322K
代理商: CY62167DV30
CY62167DV30 MoBL
Document #: 38-05328 Rev. *G
Page 4 of 12
Notes:
10.Tested initially and after any design or process changes that may affect these parameters.
11.This applies for all packages.
12.Test condition for the 45 ns part is with a load capacitance of 30 pF.
13.Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 100
μ
s or stable at V
CC(min.)
> 100
μ
s.
Capacitance
[10, 11]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25°C, f = 1 MHz, V
CC
= V
CC(typ)
8
pF
C
OUT
Output Capacitance
10
pF
Thermal Resistance
[10]
Parameter
Description
Test Conditions
VFBGA
TSOP I
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Still Air, soldered on a 3 × 4.5 inch,
2-layer printed circuit board
55
60
°
C/W
Θ
JC
Thermal Resistance
(Junction to Case)
16
4.3
°
C/W
AC Test Loads and Waveforms
[12]
V
CC
V
CC
OUTPUT
R2
50 pF
[12]
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT
V
Equivalent to:
THE VENIN EQUIVALENT
R
TH
ALL INPUT PULSES
R1
Parameters
2.5V
3.0V
Unit
R1
16667
1103
R2
15385
1554
R
TH
8000
645
V
TH
1.20
1.75
V
Data Retention Characteristics
(Over the Operating Range)
Parameter
Description
Conditions
Min.
Typ.
[2]
Max.
Unit
V
DR
V
CC
for Data Retention
1.5
V
I
CCDR
Data Retention Current
V
CC
= 1.5V
CE
1
> V
CC
– 0.2V, CE
2
< 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V
10
μ
A
t
CDR[10]
t
R[13]
Chip Deselect to Data Retention Time
0
ns
Operation Recovery Time
t
RC
ns
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