參數(shù)資料
型號: CY62148E
廠商: Cypress Semiconductor Corp.
英文描述: 4-Mbit (512K x 8) Static RAM
中文描述: 4兆位(為512k × 8)靜態(tài)RAM
文件頁數(shù): 6/10頁
文件大?。?/td> 860K
代理商: CY62148E
CY62148E MoBL
Document #: 38-05442 Rev. *F
Page 6 of 10
Switching Waveforms
Read Cycle No. 1
(Address Transition Controlled)
[16, 17]
Read Cycle No. 2
(OE Controlled)
[17, 18]
Write Cycle No. 1
(WE Controlled, OE HIGH During Write)
[19, 20]
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
ADDRESS
DATA OUT
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
HIGH IMPEDANCE
t
HZOE
t
HZCE
t
PD
IMPEDANCE
I
CC
I
SB
HIGH
ADDRESS
CE
DATA OUT
V
CC
SUPPLY
CURRENT
OE
DATA VALID
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
ADDRESS
CE
WE
DATA IO
OE
NOTE
21
Notes:
16.Device is continuously selected. OE, CE = V
IL
.
17.WE is HIGH for read cycles.
18.Address valid before or similar to CE transition LOW.
19.Data IO is high impedance if OE = V
IH
.
20.If CE goes HIGH simultaneously with WE HIGH, the output remains in high impedance state.
21.During this period, the IOs are in output state and input signals must not be applied.
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