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參數(shù)資料
| 型號： | CY62148E |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4-Mbit (512K x 8) Static RAM |
| 中文描述： | 4兆位（為512k × 8）靜態(tài)RAM |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 860K |
| 代理商： | CY62148E |
CY62148E MoBL
Document #: 38-05442 Rev. *F
Page 5 of 10
Switching Characteristics
(Over the Operating Range)
[12]
Parameter
Description
45 ns
55 ns
[2]
Unit
Min
Max
Min
Max
Read Cycle
t
RC
Read Cycle Time
45
55
ns
t
AA
Address to Data Valid
45
55
ns
t
OHA
Data Hold from Address Change
10
10
ns
t
ACE
CE LOW to Data Valid
45
55
ns
t
DOE
OE LOW to Data Valid
22
25
ns
t
LZOE
OE LOW to LOW Z
[13]
5
5
ns
t
HZOE
OE HIGH to High Z
[13, 14]
18
20
ns
t
LZCE
CE LOW to Low Z
[13]
10
10
ns
t
HZCE
CE HIGH to High Z
[13, 14]
18
20
ns
t
PU
CE LOW to Power up
0
0
ns
t
PD
Write Cycle
[15]
CE HIGH to Power down
45
55
ns
t
WC
Write Cycle Time
45
55
ns
t
SCE
CE LOW to Write End
35
40
ns
t
AW
Address Setup to Write End
35
40
ns
t
HA
Address Hold from Write End
0
0
ns
t
SA
Address Setup to Write Start
0
0
ns
t
PWE
WE Pulse Width
35
40
ns
t
SD
Data Setup to Write End
25
25
ns
t
HD
Data Hold from Write End
0
0
ns
t
HZWE
WE LOW to High-Z
[13, 14]
18
20
ns
t
LZWE
WE HIGH to Low-Z
[13]
10
10
ns
Notes
12.Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels
of 0 to 3V, and output loading of the specified I
OL
/I
OH
as shown in the
“AC Test Loads and Waveforms” on page 4
.
13.At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
LZWE
for any given device.
14.t
HZOE
, t
HZCE
, and t
HZWE
transitions are measured when the outputs enter a high impedance state.
15.The internal write time of the memory is defined by the overlap of WE, CE
= V
. All signals must be ACTIVE to initiate a write and any of these signals can
terminate a write by going INACTIVE. The data input setup and hold timing should be referenced to the edge of the signal that terminates the write.
[+] Feedback
相關(guān)PDF資料 |
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|---|---|
| CY62148ELL | 4-Mbit (512K x 8) Static RAM |
| CY62148ELL-45ZSXI | 4-Mbit (512K x 8) Static RAM |
| CY62148ELL-55SXA | 4-Mbit (512K x 8) Static RAM |
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| CY62148 | 512K x 8 Static RAM(512K x 8 靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62148E_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512K x 8) Static RAM |
| CY62148E_10 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512 K × 8) Static RAM |
| CY62148E_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512 K x 8) Static RAM Automatic power-down when deselected |
| CY62148E_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512 K x 8) Static RAM |
| CY62148ELL | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (512 K × 8) Static RAM |
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