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參數(shù)資料
| 型號(hào)： | CY62146EV30 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4-Mbit (256K x 16) Static RAM |
| 中文描述： | 4兆位（256K × 16）靜態(tài)RAM |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 440K |
| 代理商： | CY62146EV30 |
CY62146EV30 MoBL
Document #: 38-05567 Rev. *C
Page 12 of 12
Document History Page
Document Title:CY62146EV30 MoBL
, 4-Mbit (256K x 16) Static RAM
Document Number: 38-05567
REV.
**
*A
ECN NO.
223225
247373
Issue Date
See ECN
See ECN
Orig. of
Change
AJU
SYT
Description of Change
New Data Sheet
Changed Advance Information to Preliminary
Moved Product Portfolio to Page 2
Changed V
CC
stabilization time in footnote #8 from 100
μ
s to 200
μ
s
Removed Footnote #14(t
LZBE
) from Previous revision
Changed I
CCDR
from 2.0
μ
A to 2.5
μ
A
Changed typo in Data Retention Characteristics(t
R
) from 100
μ
s to t
RC
ns
Changed t
OHA
from 6 ns to 10 ns for both 35 ns and 45 ns Speed Bin
Changed t
HZOE
, t
HZBE
, t
HZWE
from 12 to 15 ns for 35 ns Speed Bin and 15 to
18 ns for 45 ns Speed Bin
Changed t
SCE
and t
BW
from 25 to 30 ns for 35 ns Speed Bin and 40 to 35 ns
for 45 ns Speed Bin
Changed t
HZCE
from 12 to 18 ns for 35 ns Speed Bin and 15 to 22 ns for 45
ns Speed Bin
Changed t
SD
from 15 to 18 ns for 35 ns Speed Bin and 20 to 22 ns for
45 ns Speed Bin
Changed t
DOE
from 15 to 18 ns for 35 ns Speed Bin
Changed t
DBE
from 15 to 18 ns for 35 ns Speed Bin
Changed Ordering Information to include Pb-Free Packages
Changed from Preliminary information to Final
Changed the address of Cypress Semiconductor Corporation on Page #1
from “3901 North First Street” to “198 Champion Court”
Removed 35ns Speed Bin
Removed “L” version of CY62146EV30
Changed ball E3 from DNU to NC
Removed the redundant foot note on DNU.
Changed I
CC
(Max) value from 2 mA to 2.5 mA and I
CC
(Typ) value from
1.5 mA to 2 mA at f=1 MHz
Changed I
CC
(Typ) value from 12 mA to 15 mA at f = f
max
Changed I
SB1
and I
SB2
Typ values from 0.7
μ
A to 1
μ
A and Max values from
2.5
μ
A to 7
μ
A.
Changed the AC test load capacitance from 50pF to 30pF on Page# 4
Changed I
CCDR
from 2.5
μ
A to 7
μ
A.
Added I
CCDR
typical value.
Changed t
LZOE
from 3 ns to 5 ns
Changed t
LZCE
and t
LZWE
from 6 ns to 10 ns
Changed t
LZBE
from 6 ns to 5 ns
Changed t
HZCE
from 22 ns to 18 ns
Changed t
PWE
from 30 ns to 35 ns.
Changed t
SD
from 22 ns to 25 ns.
Updated the package diagram 48-ball VFBGA from *B to *D
Updated the ordering information table and replaced the Package Name
column with Package Diagram.
Added footnote #8 related to I
SB2
and
I
CCDR
Added footnote #12 related AC timing parameters
*B
414807
See ECN
ZSD
*C
925501
See ECN
VKN
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62146EV30LL | 4-Mbit (256K x 16) Static RAM |
| CY62146EV30LL-45BVXI | 4-Mbit (256K x 16) Static RAM |
| CY62146EV30LL-45ZSXI | 4-Mbit (256K x 16) Static RAM |
| CY62146E | 4-Mbit (256K x 16) Static RAM |
| CY62146ELL-45ZSXA | 4-Mbit (256K x 16) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62146EV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (256K x 16) Static RAM |
| CY62146EV30LL | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4-Mbit (256K x 16) Static RAM |
| CY62146EV30LL-45BVXI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M Ultra LO Pwr HI SPD Micropwr IND RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62146EV30LL-45BVXIT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4M Ultra LO Pwr HI SPD Micropwr IND RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62146EV30LL-45ZSXA | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 4-Mb 256K x 16 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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