參數(shù)資料
型號: CY62137V18
廠商: Cypress Semiconductor Corp.
英文描述: 128K x 16 Static RAM(128K x 16靜態(tài)RAM)
中文描述: 128K的× 16靜態(tài)RAM(128K的× 16靜態(tài)RAM)的
文件頁數(shù): 4/11頁
文件大小: 225K
代理商: CY62137V18
CY62137V MoBL
CY62137V18 MoBL2
4
AC Test Loads and Waveforms
V
CC
Typ
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
< 5 ns
< 5 ns
OUTPUT
V
Equivalent to:
TH
é
VENIN EQUIVALENT
R
TH
ALL INPUT PULSES
C62137V
4
C62137V
5
R1
V
CC
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(b)
R1
R2
(a)
Parameters
R1
R2
R
TH
V
TH
3.0V
1105
1550
645
1.75V
1.8V
15294
11300
6500
0.85V
Unit
Ohms
Ohms
Ohms
Volts
Shaded areas contain preliminary information.
Data Retention Characteristics
(Over the Operating Range)
Parameter
Description
Conditions
[4]
Min.
Typ.
[2]
Max.
Unit
V
DR
V
CC
for Data Retention
(CY62137V18)
1.0
1.95
V
V
DR
V
CC
for Data Retention
(CY62137V)
1.0
3.6
V
I
CCDR
Data Retention Current
V
CC
= 1.0V
CE > V
CC
0.3V,
V
IN
> V
CC
0.3V or
V
IN
< 0.3V
No input may exceed
V
CC
+0.3V
LL
0.1
5
μ
A
t
CDR[3]
Chip Deselect to Data
Retention Time
0
ns
t
R
Operation Recovery Time
100
μ
s
Data Retention Waveform
Note:
4.
Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input levels of 0 to V
CC
typ., and output loading of the specified
I
OL
/I
OH
and 30-pF load capacitance.
C62137V
6
V
CC
(min.)
V
CC
(min.)
t
CDR
V
DR
> 1.0 V
DATA RETENTION MODE
t
R
CE
V
CC
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