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參數資料
| 型號： | CY62137CVSL-70BAXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2-Mbit (128K x 16) Static RAM |
| 中文描述： | 128K X 16 STANDARD SRAM, 70 ns, PBGA48 |
| 封裝： | 7 X 7 MM, 1.20 MM HEIGHT, LEAD FREE, VFBGA-48 |
| 文件頁數： | 1/13頁 |
| 文件大?。?/td> | 339K |
| 代理商： | CY62137CVSL-70BAXI |
2-Mbit (128K x 16) Static RAM
CY62137CV30/33 MoBL
CY62137CV MoBL
Cypress Semiconductor Corporation
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Document #: 38-05201 Rev. *G
Revised July 21, 2006
Features
Very high speed
— 55 ns
Temperature Ranges
— Industrial
:
- 40°C to + 85°C
— Automotive
:
- 40°C to + 125°C
Pin-compatible with the CY62137V
Ultra-low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 7 mA @ f = f
Max
(55 ns speed)
Low and ultra-low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Available in Pb-free and non Pb-free 48-ball FBGA
package
Functional Description
[1]
The CY62137CV30/33 and CY62137CV are high-perfor-
mance CMOS static RAMs organized as 128K words by 16
bits. These devices feature advanced circuit design to provide
ultra-low active current. This is ideal for providing More Battery
Life (MoBL
) in portable applications such as cellular
telephones. The devices also has an automatic power-down
feature that significantly reduces power consumption by 80%
when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than
99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input/output pins (I/O
0
through I/O
15
) are placed
in a high-impedance state when: deselected (CE HIGH),
outputs are disabled (OE HIGH), both Byte High Enable and
Byte Low Enable are disabled (BHE, BLE HIGH), or during a
write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
16
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Logic Block Diagram
128K x 16
RAM Array
I/O
0
–I/O
7
R
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
COLUMN DECODER
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
BLE
I/O
8
–I/O
15
CE
WE
BHE
A
1
A
0
A
9
Power - Down
Circuit
BHE
BLE
CE
A
10
[+] Feedback
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| CY62147EV30 | 4-Mbit (256K x 16) Static RAM |
| CY62147EV30LL-45BVI | 4-Mbit (256K x 16) Static RAM |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CY62137CVSL-70BAXIT | 功能描述:IC SRAM 2MBIT 70NS 48LFBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:MoBL® 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY62137CVSL-70BVI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2M (128K x 16) Static RAM |
| CY62137EV30 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
| CY62137EV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
| CY62137EV30_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (128K x 16) Static RAM |
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